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Check whether or not following tools support generated CSR modules/RAL packages.
The text was updated successfully, but these errors were encountered:
@Cra2yPierr0t has confirmed Yosis can handle Verilog RTL generated by RgGen. Thank you!
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Confirmed Vivado simulator can handle generated RTL and RAL model. rggen/rggen-sample-testbench#5
Metrics DSim can compile and execute the sample env. rggen/rggen-sample-testbench#11
Add Metrics DSim
1fe087b
(refs #79 (comment))
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Check whether or not following tools support generated CSR modules/RAL packages.
YosisThe text was updated successfully, but these errors were encountered: