Made gen a private member to avoid polluting bundle

riscv-boom · Jan 3, 2019 · f35cc75 · f35cc75
1 parent 223eb31
commit f35cc75
Showing 1 changed file with 1 addition and 1 deletion.
diff --git a/src/main/scala/util/elastic-sram.scala b/src/main/scala/util/elastic-sram.scala
@@ -10,7 +10,7 @@ package boom.util
 import chisel3._
 import chisel3.util._
 
-class ESramWritePort[T <: Data](val idx_sz: Int, val gen: T) extends Bundle
+class ESramWritePort[T <: Data](val idx_sz: Int, private val gen: T) extends Bundle
 {
    val idx = UInt(idx_sz.W)
    val data = gen