Remove vestiges of legacy RVV SLEN parameter

riscv-software-src · Sep 30, 2021 · 1355e73 · 1355e73
1 parent 583bd1e
commit 1355e73
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Showing 3 changed files with 5 additions and 13 deletions.
diff --git a/configure b/configure
@@ -1393,7 +1393,7 @@ Optional Packages:
                           --with-boost-regex=boost_regex-gcc-mt-d-1_33_1
   --with-isa=RV64IMAFDC   Sets the default RISC-V ISA
   --with-priv=MSU         Sets the default RISC-V privilege modes supported
-  --with-varch=vlen:128,elen:64,slen:128
+  --with-varch=vlen:128,elen:64
                           Sets the default vector config
   --with-target=riscv64-unknown-elf
                           Sets the default target config
@@ -5920,7 +5920,7 @@ _ACEOF
 else
 
 cat >>confdefs.h <<_ACEOF
-#define DEFAULT_VARCH "vlen:128,elen:64,slen:128"
+#define DEFAULT_VARCH "vlen:128,elen:64"
 _ACEOF
 
 fi

diff --git a/riscv/processor.cc b/riscv/processor.cc
@@ -127,7 +127,6 @@ void processor_t::parse_varch_string(const char* s)
   size_t len = str.length();
   int vlen = 0;
   int elen = 0;
-  int slen = 0;
   int vstart_alu = 1;
 
   while (pos < len) {
@@ -137,8 +136,6 @@ void processor_t::parse_varch_string(const char* s)
 
     if (attr == "vlen")
       vlen = get_int_token(str, ',', pos);
-    else if (attr == "slen")
-      slen = get_int_token(str, ',', pos);
     else if (attr == "elen")
       elen = get_int_token(str, ',', pos);
     else if (attr == "vstartalu")
@@ -150,18 +147,13 @@ void processor_t::parse_varch_string(const char* s)
   }
 
   // The integer should be the power of 2
-  if (!check_pow2(vlen) || !check_pow2(elen) || !check_pow2(slen)){
+  if (!check_pow2(vlen) || !check_pow2(elen)){
     bad_varch_string(s, "The integer value should be the power of 2");
   }
 
-  if (slen == 0)
-    slen = vlen;
-
   /* Vector spec requirements. */
   if (vlen < elen)
     bad_varch_string(s, "vlen must be >= elen");
-  if (vlen != slen)
-    bad_varch_string(s, "vlen must be == slen for current limitation");
 
   /* spike requirements. */
   if (vlen > 4096)

diff --git a/riscv/riscv.ac b/riscv/riscv.ac
@@ -21,10 +21,10 @@ AC_ARG_WITH(priv,
   AC_DEFINE_UNQUOTED([DEFAULT_PRIV], "MSU", [Default value for --priv switch]))
 
 AC_ARG_WITH(varch,
-	[AS_HELP_STRING([--with-varch=vlen:128,elen:64,slen:128],
+	[AS_HELP_STRING([--with-varch=vlen:128,elen:64],
 		[Sets the default vector config])],
   AC_DEFINE_UNQUOTED([DEFAULT_VARCH], "$withval", [Default value for --varch switch]),
-  AC_DEFINE_UNQUOTED([DEFAULT_VARCH], ["vlen:128,elen:64,slen:128"], [Default value for --varch switch]))
+  AC_DEFINE_UNQUOTED([DEFAULT_VARCH], ["vlen:128,elen:64"], [Default value for --varch switch]))
 
 AC_ARG_WITH(target,
 	[AS_HELP_STRING([--with-target=riscv64-unknown-elf],