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253 Open 551 Closed
253 Open 551 Closed
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Issues list

spike.cfg : remote_bitbang host localhost should be remote_bitbang_host in OPENOCD's
#1739 opened Jul 18, 2024 by yesuweiYYYY
Possible to forward a Ctrl-C to the running program?
#1738 opened Jul 18, 2024 by wsong83
htif : elf load , invalid address
#1737 opened Jul 17, 2024 by svasekar
Dose write-only operation to csr_seed trigger illegal instruction exception ?
#1728 opened Jul 15, 2024 by chihminchao
1
Incorrect IRQ priority with LCOF
#1725 opened Jul 11, 2024 by JJ-Gaisler
Dependency file in makefile is missing
#1723 opened Jul 9, 2024 by hegdeabhi
spike cache model
#1720 opened Jul 2, 2024 by ztjjj9
Use input DTB to set all processor + device configurations properly
#1716 opened Jun 30, 2024 by abejgonzalez
Documentation to add an MMIO device as a plugin
#1708 opened Jun 26, 2024 by Koceilito
1
doubt with vector masking register instruction
#1706 opened Jun 24, 2024 by deepaannnavi
What time the spike will support the zjpm extension?
#1693 opened Jun 14, 2024 by yangye0212
Zfa extension instruction fcvtmod_w_d behavior conflict with sail model on too large/ too small boundary
#1669 opened May 16, 2024 by GuoShibo-cn
2
reading mtinst gives illegal instruction exception
#1653 opened Apr 25, 2024 by omerguzelelectronicguy
1
mcontrol6.timing bit is set
#1651 opened Apr 24, 2024 by JAYANTH-IITM
4
frm is illegal value , a vector fp inst raise illegal inst but it still will make vs dirty
#1646 opened Apr 18, 2024 by xinyuwang-starfive
1
mseccfg useed and sseed bits cannot be modified when zkr is implemented
#1644 opened Apr 17, 2024 by adrianjimnzz
Supporting variable XLEN
#1643 opened Apr 11, 2024 by aswaterman
3
[BUG] Entering interactive mode breaks UART input
#1639 opened Apr 4, 2024 by dkaszews
illegal instruction trap at vlm.v instr
#1638 opened Apr 4, 2024 by syedarafia13
5
Why does my custom instruction simulation run incorrectly？
#1636 opened Mar 31, 2024 by niuzhi1221
disabling user mode in misa - need some direction
#1634 opened Mar 28, 2024 by neelgala
1
Label and register recognition in interactive debug mode
#1633 opened Mar 27, 2024 by dkaszews
2
Clarification needed for Stopcount and Stoptime bits in DCSR ( in spike )
#1621 opened Mar 11, 2024 by abhi-valtrix
1
how can I work in baremetal risc-v debug mode?
#1620 opened Mar 11, 2024 by omerguzelelectronicguy
Provide C API for Spike Integration with Other Languages
#1616 opened Feb 29, 2024 by Clo91eaf
1
ProTip! Updated in the last three days: updated:>2024-07-19.