How to Add custom instructions to riscv-elf-toolchain

[rahulraveendran15-coder]

Hi,

I want to implement some custom instructions on riscv-architecture to speed up my process.
How can I add the custom instruction to the tool chain, so that on compilation it can get new instructions. Is it possible to add custom instructions to riscv-elf-tool chain? I am not finding any respective documents/reference for this

[jim-wilson]

You can find gcc info at gcc.gnu.org. There are some tutorials there under the "pointers" link but I'm not sure how good they are.

I've given brief overviews of the process in various places. Here is one for instance
https://groups.google.com/a/groups.riscv.org/g/sw-dev/c/sL_OHXYj3LY/m/Gsm6sBc9BQAJ

[TommyMurphyTM1234]

This is a list of all issues logged that I can find that relate to adding new instructions to the toolchain:

• How to add support for a new instruction? #1095
• Adding custom instruction to vector compiler #1055
• Adding custom instruction to the elf tool-chain #837
• How to Add custom instructions to riscv-elf-toolchain #782
• Adding rvv intrinsic to already installed toolchain #1003
• How to add a custom non-standard instruction type format #795
• how can I modify functionality of an instruction? #660
• question about adding "mod" instruction #543
• Searching for explainations to define a new instruction in the "struct riscv-opcode " #341
• adding new opode extensions #115

At this stage in the evolution of RISC-V,the majority of instruction addition will be done under the auspices of the relevant groups working on standardising, prototyping, and implementing/enhancing RISC-V extensions and their corresponding instructions. As such, there should be less of a demand for others to do so.

However, where somebody still wants to implement a non standard custom extension/instruction here are some useful resources:

• GCC internals documentation: https://gcc.gnu.org/onlinedocs/gccint/
• https://medium.com/@viveksgt/adding-custom-instructions-compilation-support-to-riscv-toolchain-78ce1b6efcf4
• https://hsandid.github.io/posts/risc-v-custom-instruction/
• https://ossg.bcs.org/blog/2020/10/29/adding-an-instruction-to-the-gnu-assembler/
• https://embdev.net/topic/228773
• https://groups.google.com/u/0/a/groups.riscv.org/g/sw-dev/c/sL_OHXYj3LY/m/NOm5Fwa3BAAJ
• https://forums.sifive.com/t/adding-custom-instruction-to-riscv-toolchain/4044/2