hw: Consolidate clock-related code

This commit consolidates the common clock-related functions for the x86
and amd64 hw platform into platform/hw/arch/x86/clock.c.

No functional change intended.

platform/hw/arch/amd64/Makefile.inc

@@ -4,6 +4,7 @@ OBJS_BMK+=	arch/amd64/machdep.o arch/amd64/boot.o
 OBJS_BMK+=	arch/x86/vgacons.o
 OBJS_BMK+=	arch/x86/cpu_subr.o
 OBJS_BMK+=	arch/x86/x86_subr.o
+OBJS_BMK+=	arch/x86/clock.o
 
 LDSCRIPT=	arch/amd64/kern.ldscript
 

platform/hw/arch/amd64/machdep.c

@@ -83,7 +83,6 @@ struct tss {
 static struct gate_descriptor idt[256];
 
 /* actual interrupt service routines */
-void bmk_cpu_isr_clock(void);
 void bmk_cpu_isr_9(void);
 void bmk_cpu_isr_10(void);
 void bmk_cpu_isr_11(void);
@@ -132,9 +131,6 @@ bmk_cpu_init(void)
 
 	bmk_x86_initpic();
 
-	/* fill clock interrupt */
-	bmk_x86_fillgate(32, bmk_cpu_isr_clock, 0);
-
 	/*
 	 * fill TSS
 	 */
@@ -154,7 +150,7 @@ bmk_cpu_init(void)
 	td->td_zero = 0;
 	bmk_amd64_ltr(4*8);
 
-	bmk_x86_inittimer();
+	bmk_x86_initclocks();
 }
 
 void bmk_cpu_pagefault(void *, void *);

platform/hw/arch/i386/Makefile.inc

@@ -3,6 +3,7 @@ OBJS_BMK+=	arch/i386/locore32.o arch/i386/machdep.o arch/i386/boot.o
 OBJS_BMK+=	arch/x86/vgacons.o
 OBJS_BMK+=	arch/x86/cpu_subr.o
 OBJS_BMK+=	arch/x86/x86_subr.o
+OBJS_BMK+=	arch/x86/clock.o
 
 LDSCRIPT=	arch/i386/kern.ldscript
 

platform/hw/arch/i386/machdep.c

@@ -57,9 +57,6 @@ static struct gate_descriptor idt[256];
 /* interrupt-not-service-routine */
 void bmk_cpu_insr(void);
 
-/* actual interrupt service routines */
-void bmk_cpu_isr_clock(void);
-
 void
 bmk_x86_fillgate(int num, void *fun, int unused)
 {
@@ -157,14 +154,7 @@ bmk_cpu_init(void)
 
 	bmk_x86_initpic();
 
-	/*
-	 * map clock interrupt.
-	 * note, it's still disabled in the PIC, we only enable it
-	 * during nanohlt
-	 */
-	bmk_x86_fillgate(32, bmk_cpu_isr_clock, 0);
-
-	bmk_x86_inittimer();
+	bmk_x86_initclocks();
 }
 
 void

platform/hw/arch/x86/clock.c

@@ -0,0 +1,79 @@
+/*-
+ * Copyright (c) 2014, 2015 Antti Kantee.  All Rights Reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS
+ * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+#include <bmk/kernel.h>
+
+/* clock isr trampoline (in locore.S) */
+void bmk_cpu_isr_clock(void);
+
+void
+bmk_x86_initclocks(void)
+{
+
+	/*
+	 * map clock interrupt.
+	 * note, it's still disabled in the PIC, we only enable it
+	 * during nanohlt
+	 */
+	bmk_x86_fillgate(32, bmk_cpu_isr_clock, 0);
+
+	/* initialize the timer to 100Hz */
+	outb(TIMER_MODE, TIMER_RATEGEN | TIMER_16BIT);
+	outb(TIMER_CNTR, TIMER_HZ/HZ & 0xff);
+	outb(TIMER_CNTR, TIMER_HZ/HZ >> 8);
+}
+
+void
+bmk_isr_clock(void)
+{
+
+	/* nada */
+}
+
+bmk_time_t
+bmk_cpu_clock_now(void)
+{
+	uint64_t val;
+	unsigned long eax, edx;
+
+	/* um um um */
+	__asm__ __volatile__("rdtsc" : "=a"(eax), "=d"(edx));
+	val = ((uint64_t)edx<<32)|(eax);
+
+	/* just approximate that 1 cycle = 1ns.  "good enuf" for now */
+	return val;
+}
+
+void
+bmk_cpu_nanohlt(void)
+{
+
+	/*
+	 * Enable clock interrupt and wait for the next whichever interrupt
+	 */
+	outb(PIC1_DATA, 0xff & ~(1<<2|1<<0));
+	hlt();
+	outb(PIC1_DATA, 0xff & ~(1<<2));
+}

platform/hw/arch/x86/cpu_subr.c

@@ -73,29 +73,3 @@ bmk_cpu_intr_ack(void)
 	    "outb %%al, $0x20\n"
 	    ::: "al");
 }
-
-bmk_time_t
-bmk_cpu_clock_now(void)
-{
-	uint64_t val;
-	unsigned long eax, edx;
-
-	/* um um um */
-	__asm__ __volatile__("rdtsc" : "=a"(eax), "=d"(edx));
-	val = ((uint64_t)edx<<32)|(eax);
-
-	/* just approximate that 1 cycle = 1ns.  "good enuf" for now */
-	return val;
-}
-
-void
-bmk_cpu_nanohlt(void)
-{
-
-	/*
-	 * Enable clock interrupt and wait for the next whichever interrupt
-	 */
-	outb(PIC1_DATA, 0xff & ~(1<<2|1<<0));
-	hlt();
-	outb(PIC1_DATA, 0xff & ~(1<<2));
-}

platform/hw/arch/x86/x86_subr.c

@@ -46,16 +46,6 @@ bmk_x86_initpic(void)
 	outb(PIC2_DATA, 0xff);	/* all masked */
 }
 
-void
-bmk_x86_inittimer(void)
-{
-
-	/* initialize the timer to 100Hz */
-	outb(TIMER_MODE, TIMER_RATEGEN | TIMER_16BIT);
-	outb(TIMER_CNTR, (TIMER_HZ/HZ) & 0xff);
-	outb(TIMER_CNTR, (TIMER_HZ/HZ) >> 8);
-}
-
 /* interrupt-not-service-routine */
 void bmk_cpu_insr(void);
 

platform/hw/include/arch/x86/var.h

@@ -4,7 +4,7 @@
 #ifndef _LOCORE
 void	bmk_x86_initpic(void);
 void	bmk_x86_initidt(void);
-void	bmk_x86_inittimer(void);
+void	bmk_x86_initclocks(void);
 void	bmk_x86_fillgate(int, void *, int);
 
 /* trap "handlers" */

platform/hw/intr.c

@@ -53,13 +53,6 @@ static unsigned int isr_lowest = sizeof(isr_todo)*8;
 
 static struct bmk_thread *isr_thread;
 
-void
-bmk_isr_clock(void)
-{
-
-	/* nada */
-}
-
 /* thread context we use to deliver interrupts to the rump kernel */
 static void
 isr(void *arg)