TestHardware failing

[ChrisPattison]

I just noticed yesterday that TestHardware fails with hw_emu and hw on 58a3e80. I also checked the commit from before #8 was merged and also found a failure. @definelicht can you duplicate it?

[definelicht]

We have wrong results being produced by the hardware kernel if that's what you mean? I'm trying to debug what the difference between simulation and hardware could be to cause this.

Remember to post an error message ;-)

[ChrisPattison]

After poking at the tests a little bit I now understand a bit about what's going on. I was under the impression that hw_emu=simulation, but I seem to be mistaken. hw_emu is still a simulation to me! ;)

[ChrisPattison]

The simulation seems to fail with the inputs ./TestSimulation 4 4 33

~/apfp_main/build (git)-[main] % ./TestSimulation 4 4 33
Configuring the device... Done.
Initializing input data... Done.
Copying data to the device... Done.
The expected number of cycles to completion is 8192, which is 2.73067e-05 seconds at 300 MHz.
This communicates 0.589824 MB, requiring a bandwidth of 21.6 GB/s.
Executing kernel...
Ran in 5.09708 seconds.
Running reference implementation...
Ran in 0.000106859 seconds.
Verification failed at (1, 0):
        +16202d6692d8b2c3|669cd26f38d26157|fabbd81e249ee1ef|98705b776af68ab6|1b0dd56186915784|2b609f1b2d954e87|9edaec3633bee0e7|64262f654fe7fbd5|69f1a996cda6a203|6ac7cea0d256703a|34fd63fa921dec99|9139bd98f1ba5905|41ff7783880ae29c|e28bcd0d28059f9b|ffffffffffffffffe-1
        +15f47195a82f0e26|bab90bfe17c61655|bf00bbe64238291e|8918ad96163822de|5838af076aeffcf1|37c781a73c30fdf2|0a2500739250e366|af7b97224e111478|f98cf4195a2cc839|e2d084a65b029ec0|81fba2672896ee48|bdd55080f9f7645d|5ff9a7f584736501|c54aa7f6b9e342c0|0000000000000001e1
./TestSimulation 4 4 33  5.42s user 0.43s system 114% cpu 5.100 total

[definelicht]

You correctly identified the issue (via Mattermost), the writer sometimes writes out of bounds when not a multiple of the tile size. The annoying this is that we have to put the expensive off-chip memory access in a branch. Check out the PR and see what you think

[ChrisPattison]

I'm not terribly concerned because HLS should generate a simple state machine for the branch that in principle could be II=1