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net/mlx5: fix secondary process initialization ordering
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[ upstream commit 69b44d6 ]

The memory barrier is used to ensure that the response is returned
only after the Tx/Rx function is set, it should place after the Rx/Tx
function is set.

Fixes: 2aac5b5 ("net/mlx5: sync stop/start with secondary process")

Signed-off-by: Chengwen Feng <fengchengwen@huawei.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
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fengchengwen authored and steevenlee committed Jun 8, 2021
1 parent 14b6df2 commit cb97d59
Showing 1 changed file with 1 addition and 1 deletion.
2 changes: 1 addition & 1 deletion drivers/net/mlx5/linux/mlx5_mp_os.c
Expand Up @@ -130,7 +130,6 @@ struct rte_mp_msg mp_res;
switch (param->type) {
case MLX5_MP_REQ_START_RXTX:
DRV_LOG(INFO, "port %u starting datapath", dev->data->port_id);
rte_mb();
dev->rx_pkt_burst = mlx5_select_rx_function(dev);
dev->tx_pkt_burst = mlx5_select_tx_function(dev);
ppriv = (struct mlx5_proc_priv *)dev->process_private;
Expand All @@ -147,6 +146,7 @@ struct rte_mp_msg mp_res;
return -rte_errno;
}
}
rte_mb();
mp_init_msg(&priv->mp_id, &mp_res, param->type);
res->result = 0;
ret = rte_mp_reply(&mp_res, peer);
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