| 🌟 | Name | Description | 🌍 |
|---|---|---|---|
| 28 | @BYVoid/MIPS32 | A MIPS32 CPU implemented by VHDL | |
| 27 | @ziyan/altera-de2-ann | Artificial Neural Network on Altera DE2 | |
| 25 | @chenxiao07/vhdl-nes | nes emulator based on VHDL | |
| 10 | @ikwzm/msgpack-vhdl | MessagePack implementation for VHDL | |
| 8 | @nyuichi/GAIA3 | GAIA Processor | |
| 7 | @ikwzm/MT32_Rand_Gen | Mersenne Twister Pseudo Random Number Generator written in VHDL(RTL) for FPGA(Xilinx and Altera). | |
| 7 | @ikwzm/SECURE_HASH | SHA-1,SHA-256,SHA-512 Secure Hash Generator written in VHDL(RTL) for FPGA(Xilinx and Altera). | |
| 4 | @ikwzm/Dummy_Plug | Dummy Plug is a simple bus functional model library written by VHDL only. | |
| 4 | @ikwzm/FPGA-SoC-Linux-Example-1-DE10-Nano | FPGA-SoC-Linux example(1) binary and project and test code for DE10-Nano | |
| 4 | @ikwzm/PipeWork | Pipework components is VHDL library for NoC(Network on Chip). | |
| 4 | @ikwzm/qconv-strip-vhdl | This repository provides VHDL code for performing quantized convolution for deep neural networks on FPGA/ASIC. | |
| 4 | @osafune/max10_famimachime | ||
| 4 | @osafune/sha256_core | ||
| 3 | @ikwzm/Least_Recently_Used_Selector | Least Recently Used Selector(LRU) | |
| 3 | @ikwzm/PTTY_AXI | Pseudo TeleTYpe writer for FPGA. | |
| 3 | @ikwzm/PUMP_AXI4 | Simple AXI4 Master Read and Write DMA module. Use PipeWork Components. | |
| 3 | @ikwzm/QCONV-STRIP-Ultra96 | Quantized Convolution (strip) binary and project and test code for Ultra96 | |
| 3 | @ikwzm/axi_slave_bfm_test | TestBench for axi_slave_BFM | |
| 3 | @ikwzm/iroha-ruby | Iroha for ruby | |
| 3 | @ikwzm/merge_sorter | merge sorter tree written by VHDL | |
| 3 | @kimushu/rubic-fpga | mruby for FPGA |