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Review CTS/DTR pin selection on FTDI interface #6

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JohnOH opened this issue Jan 12, 2017 · 7 comments
Closed

Review CTS/DTR pin selection on FTDI interface #6

JohnOH opened this issue Jan 12, 2017 · 7 comments

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@JohnOH
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JohnOH commented Jan 12, 2017

If extender was mounted under the BP we have the option to collect the 4 pin group carrying GND/DCLK/DIO/3v3 in order to use DCLK & DIO similarly to HyTiny extender - see below:
https://github.com/jeelabs/embello/issues/35
This approach supports all the programming options via the FTDI port.

Extender on top would mean light pipes or holes to the see the LEDs - possible.

@JohnOH
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JohnOH commented Jan 12, 2017

Excessive enthusiasm on my part. The pin-out for a SER+ should be as above but the pin-in for a JNZ or similar needs to use BOOT0 and Reset.

@JohnOH
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JohnOH commented Jan 14, 2017

Review is still desirable since the FTDI port appears able to support the BMP firmware. The RX/TX and GND look good - not so sure about the DTR/CTS driving pins and their match to the standard BMP image. The 5v needs care to make sure it goes via a regulator on the target or is not activativated.

@JohnOH
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JohnOH commented Jan 14, 2017

Looks like these are the BMP pins:

TARGETBOARD     JC66_COREBOARD
 GND             GND
 SWDIO           PA4  * 
 SWCLK           PA5  *
 POWER           3.3V from someplace with a common ground. Probably easiest to plug both boards in to USB

@tht
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tht commented Feb 9, 2017

There are some good tutorials for converting a BP into a BMP (hackaday).

For the moment this extension board is for BPs used as a programming target on a breadboard. IMHO this kinda conflicts with this issue and I don't want to include complicated parts like light pipes only to get the LEDs back.

Do I miss something here? Do you have a specific use-case?

@tht tht closed this as completed Feb 9, 2017
@JohnOH
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JohnOH commented Feb 9, 2017

np, and thanks for the hackaday link.

@JohnOH
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JohnOH commented Feb 11, 2017

I appreciate that this board can operate as a node, subordinate to a Ser+ using its FTDI interface. I guess it can't operate as a Ser+ because of the choices made with regard to DTR and CTS/RTS.

I may be losing the plot here.

@JohnOH
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JohnOH commented Feb 11, 2017

Ser+ uses the SWD pins which are available on the tail end of the BP. Could use the two SWD pins to drive the DTR/RTS pins on a target node. TXD/RXD still derived from the FTDI header.

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