A lock in amplifier running on the RedPitaya's FPGA
-
Updated
Jan 29, 2019 - Verilog
A lock in amplifier running on the RedPitaya's FPGA
Modifies the FPGA for a RedPitaya of PyRPL, so that the built in lock in amplifier can output a sinusoidally frequency modulated oscillation
Add a description, image, and links to the lock-in-amplifier topic page so that developers can more easily learn about it.
To associate your repository with the lock-in-amplifier topic, visit your repo's landing page and select "manage topics."