Modifies the FPGA for a RedPitaya of PyRPL, so that the built in lock in amplifier can output a sinusoidally frequency modulated oscillation
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Updated
Nov 20, 2019 - Verilog
Modifies the FPGA for a RedPitaya of PyRPL, so that the built in lock in amplifier can output a sinusoidally frequency modulated oscillation
A lock in amplifier running on the RedPitaya's FPGA
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