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add small div/sqrt unit #17

Merged
merged 3 commits into from May 30, 2017
Merged

add small div/sqrt unit #17

merged 3 commits into from May 30, 2017

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yunsup
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@yunsup yunsup commented May 24, 2017

A SiFive contribution. Thanks @jhauser-ucberkeley!

@colinschmidt
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Small means physically small? The difference between this unit and the other Div/Sqrt unit is that this will not produce more than one result bit per cycle?

@aswaterman
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Yeah, that's right.

After an uncommon-case operation, outValid would remain high until
another inValid was presented, instead of going low after one cycle.
@aswaterman
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I've updated this PR to fix a couple issues:

  • A control bug: after an uncommon-case sqrt, outValid_sqrt went high then stayed high, rather than going low after one cycle. The culprit was the control for the cycleNum mux; using entering & ! normalCase_S in place of inReady & ! normalCase_S is the fix.
  • Two minor chisel3 incompatibilities (mixing UInt/SInt in assignments/muxes).

@jhauser-ucberkeley jhauser-ucberkeley merged commit 6909906 into master May 30, 2017
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4 participants