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Fix IO direction for host Serial-TL port #1654

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merged 1 commit into from
Nov 7, 2023
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ethanwu10
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cloneType is a Chisel-internal method; use chiselTypeOf to construct an IO of the same type and direction.

cloneType appears to strip the Flipped modifier from types, so attempting to instantiate a bringup host config with a serial-TL clock driven by the DUT results in a connection failure during elaboration since both the ChipTop IO and the DigitalTop port are drivers.

Related PRs / Issues:

Type of change:

  • Bug fix
  • New feature
  • Other enhancement

Impact:

  • RTL change
  • Software change (RISC-V software)
  • Build system change
  • Other

Contributor Checklist:

  • Did you set main as the base branch?
  • Is this PR's title suitable for inclusion in the changelog and have you added a changelog:<topic> label?
  • Did you state the type-of-change/impact?
  • Did you delete any extraneous prints/debugging code?
  • Did you mark the PR with a changelog: label?
  • (If applicable) Did you update the conda .conda-lock.yml file if you updated the conda requirements file?
  • (If applicable) Did you add documentation for the feature?
  • (If applicable) Did you add a test demonstrating the PR?
  • (If applicable) Did you mark the PR as Please Backport?

`cloneType` is a Chisel-internal method, use `chiselTypeOf` to construct
an IO of the same type and direction.
@jerryz123 jerryz123 merged commit 855c897 into main Nov 7, 2023
52 of 53 checks passed
@ethanwu10 ethanwu10 deleted the tlser-punchthrough-io branch November 9, 2023 05:27
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2 participants