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Add Chip ID Pin and Port #1721

Merged
merged 7 commits into from
Jan 16, 2024
Merged

Add Chip ID Pin and Port #1721

merged 7 commits into from
Jan 16, 2024

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schwarz-em
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Adds a chip ID port that is used to assign a chip ID to each chip within a config. The port drives a MMIO register (see testchipip/#212). Currently, the port value is hardcoded in WithChipIdPinFromHarness, but the harness binder will be modified in the future to use the chipId argument (see #1716).

The purpose of this PR is to enable cache coherency across multi-chip configs in Chipyard.

Related PRs / Issues:

Type of change:

  • Bug fix
  • New feature
  • Other enhancement

Impact:

  • RTL change
  • Software change (RISC-V software)
  • Build system change
  • Other

Contributor Checklist:

  • Did you set main as the base branch?
  • Is this PR's title suitable for inclusion in the changelog and have you added a changelog:<topic> label?
  • Did you state the type-of-change/impact?
  • Did you delete any extraneous prints/debugging code?
  • Did you mark the PR with a changelog: label?
  • (If applicable) Did you update the conda .conda-lock.yml file if you updated the conda requirements file?
  • (If applicable) Did you add documentation for the feature?
  • (If applicable) Did you add a test demonstrating the PR?
  • (If applicable) Did you mark the PR as Please Backport?

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@jerryz123 jerryz123 left a comment

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Let's just fix up some naming, then we can merge this.

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@jerryz123 jerryz123 left a comment

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It looks like a lot of the configs don't like this pin, so we should disable it in AbstractConfig.

@jerryz123 jerryz123 merged commit b08ada1 into main Jan 16, 2024
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@jerryz123 jerryz123 deleted the chip-id-pin branch January 16, 2024 18:16
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2 participants