Importing dsptools.numbers._ now includes implicits by default (#102)

ucb-bar · Sep 18, 2017 · 0924b6e · 0924b6e
1 parent 53f6ce7
commit 0924b6e
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Showing 18 changed files with 36 additions and 45 deletions.
diff --git a/src/main/scala/dsptools/numbers/algebra_types/Spire.scala b/src/main/scala/dsptools/numbers/algebra_types/Spire.scala
diff --git a/src/main/scala/dsptools/numbers/chisel_concrete/DspReal.scala b/src/main/scala/dsptools/numbers/chisel_concrete/DspReal.scala
@@ -107,6 +107,14 @@ class DspReal(lit: Option[BigInt] = None) extends Bundle {
     oneOperandOperator(Module(new BBFCeil()))
   }
 
+  def round(): DspReal = (this + DspReal(0.5)).floor()
+
+  def truncate(): DspReal = {
+    Mux(this < DspReal(0.0), this.ceil(), this.floor())
+  }
+
+  def abs(): DspReal = Mux(this < DspReal(0.0), DspReal(0.0) - this, this)
+
   // Assumes you're using chisel testers
   private def backendIsVerilator: Boolean = {
     chisel3.iotesters.Driver.optionsManager.testerOptions.backendName == "verilator"
@@ -139,7 +147,6 @@ class DspReal(lit: Option[BigInt] = None) extends Bundle {
         val terms = TrigUtility.sinCoeff(nmax).zip(xpow) map { case ((c, scale), x) => DspReal(c) * x / DspReal(scale)}
         terms.reduceRight(_ + _) * in
       }
-      import dsptools.numbers.implicits._
       val num2Pi = (this / twoPi).truncate()
       // Repeats every 2*pi, so normalize to -pi, pi
       val normalized2Pi= this - num2Pi * twoPi
@@ -191,7 +198,6 @@ class DspReal(lit: Option[BigInt] = None) extends Bundle {
       def tanPiOver2(in: DspReal): DspReal = {
         in.sin()/in.cos()
       }
-      import dsptools.numbers.implicits._
       val numPi = (this / pi).truncate()
       // Repeats every pi, so normalize to -pi/2, pi/2
       // tan(x + pi) = tan(x)
@@ -220,7 +226,6 @@ class DspReal(lit: Option[BigInt] = None) extends Bundle {
         val terms2 = TrigUtility.atanCoeff2(m).zip(xpow2) map { case (c, x) => DspReal(c) * x }
         (terms1 ++ terms2).reduceRight(_ + _) * in
       }
-      import dsptools.numbers.implicits._
       val isNeg = this.signBit()
       // arctan(-x) = -arctan(x)
       val inTemp = this.abs()
@@ -256,7 +261,6 @@ class DspReal(lit: Option[BigInt] = None) extends Bundle {
   // y.atan2(x)
   def atan2 (arg1: DspReal): DspReal = {
     if (backendIsVerilator) {
-      import dsptools.numbers.implicits._
       val x = arg1
       val y = this
       val atanArg = y / x
@@ -369,4 +373,4 @@ object DspReal {
 
   def apply(): DspReal = new DspReal()
 
-}
+}
diff --git a/src/main/scala/dsptools/numbers/chisel_types/DspComplexTypeClass.scala b/src/main/scala/dsptools/numbers/chisel_types/DspComplexTypeClass.scala
@@ -61,10 +61,10 @@ class DspComplexRing[T <: Data:Ring] extends Ring[DspComplex[T]] with hasContext
 
 class DspComplexEq[T <: Data:Eq] extends Eq[DspComplex[T]] with hasContext {
   override def eqv(x: DspComplex[T], y: DspComplex[T]): Bool = {
-    (x.real === y.real) && (x.imag === y.imag)
+    Eq[T].eqv(x.real, y.real) && Eq[T].eqv(x.imag, y.imag)
   }
   override def neqv(x: DspComplex[T], y: DspComplex[T]): Bool = {
-    (x.real =/= y.real) || (x.imag =/= y.imag)
+    Eq[T].neqv(x.real, y.real) || Eq[T].neqv(x.imag, y.imag)
   }
 }
 

diff --git a/src/main/scala/dsptools/numbers/chisel_types/DspRealTypeClass.scala b/src/main/scala/dsptools/numbers/chisel_types/DspRealTypeClass.scala
@@ -46,7 +46,7 @@ trait DspRealSigned extends Any with Signed[DspReal] with DspRealRing with hasCo
   def signum(a: DspReal): ComparisonBundle = {
     ComparisonHelper(a === DspReal(0.0), a < DspReal(0.0))
   }
-  def abs(a: DspReal): DspReal = Mux(a < DspReal(0.0), DspReal(0.0) - a, a)
+  def abs(a: DspReal): DspReal = a.abs()
   def context_abs(a: DspReal): DspReal = {
     Mux(
       isSignNonNegative(ShiftRegister(a, context.numAddPipes)),
@@ -71,7 +71,7 @@ trait DspRealIsReal extends Any with IsReal[DspReal] with DspRealOrder with DspR
   def isWhole(a: DspReal): Bool = a === round(a)
   // Round *half up* -- Different from System Verilog definition! (where half is rounded away from zero)
   // according to 5.7.2 (http://www.ece.uah.edu/~gaede/cpe526/2012%20System%20Verilog%20Language%20Reference%20Manual.pdf)
-  def round(a: DspReal): DspReal = floor(a + DspReal(0.5))
+  def round(a: DspReal): DspReal = a.round()
   def truncate(a: DspReal): DspReal = {
     Mux(ShiftRegister(a, context.numAddPipes) < DspReal(0.0), context_ceil(a), floor(ShiftRegister(a, context.numAddPipes)))
   }
@@ -114,7 +114,6 @@ trait BinaryRepresentationDspReal extends BinaryRepresentation[DspReal] with has
 
 trait DspRealReal extends DspRealRing with DspRealIsReal with ConvertableToDspReal with 
     ConvertableFromDspReal with BinaryRepresentationDspReal with RealBits[DspReal] with hasContext {
-  import dsptools.numbers.implicits._
   def signBit(a: DspReal): Bool = isSignNegative(a)
   override def fromInt(n: Int): DspReal = super[ConvertableToDspReal].fromInt(n)
   override def fromBigInt(n: BigInt): DspReal = super[ConvertableToDspReal].fromBigInt(n)

diff --git a/src/main/scala/dsptools/numbers/chisel_types/SIntTypeClass.scala b/src/main/scala/dsptools/numbers/chisel_types/SIntTypeClass.scala
@@ -153,7 +153,6 @@ trait SIntInteger extends SIntRing with SIntIsReal with ConvertableToSInt with
     case Some(w) if n > w => 0.S
     // TODO: Is this too conservative?
     case _ => {
-      import dsptools.numbers.implicits._
       val div2Out = DspContext.withTrimType(NoTrim) { asFixed(a).div2(n) }
       div2Out.trimBinary(0).asSInt
     }

diff --git a/src/main/scala/dsptools/numbers/implicits/AllOps.scala b/src/main/scala/dsptools/numbers/implicits/AllOps.scala
@@ -128,4 +128,4 @@ class ContextualRingOps[A <: Data](lhs: A)(implicit ev: Ring[A]) {
   def context_-(rhs: A): A = ev.minusContext(lhs, rhs)
   def context_*(rhs: A): A = ev.timesContext(lhs, rhs)
   def context_unary_-(): A = ev.negateContext(lhs)
-}
+}
diff --git a/src/main/scala/dsptools/numbers/package.scala b/src/main/scala/dsptools/numbers/package.scala
@@ -0,0 +1,14 @@
+package dsptools
+
+package object numbers extends AllSyntax with AllImpl with spire.syntax.RingSyntax
+/*with spire.syntax.AllSyntax*/ {
+  type AdditiveGroup[T]           = spire.algebra.AdditiveGroup[T]
+  type CMonoid[T]                 = spire.algebra.CMonoid[T]
+  type ConvertableFrom[T]         = spire.math.ConvertableFrom[T]
+  type Field[T]                   = spire.algebra.Field[T]
+  type MultiplicativeAction[T, U] = spire.algebra.MultiplicativeAction[T, U]
+  type MultiplicativeCMonoid[T]   = spire.algebra.MultiplicativeCMonoid[T]
+
+  val Multiplicative              = spire.algebra.Multiplicative
+
+}
diff --git a/src/test/scala/dsptools/DspContextSpec.scala b/src/test/scala/dsptools/DspContextSpec.scala
@@ -3,8 +3,7 @@
 package dsptools
 
 import chisel3._
-import dsptools.numbers.Ring
-import dsptools.numbers.implicits._
+import dsptools.numbers._
 import org.scalatest.{FreeSpec, Matchers}
 
 //scalastyle:off magic.number

diff --git a/src/test/scala/dsptools/ShiftRegisterDelaySpec.scala b/src/test/scala/dsptools/ShiftRegisterDelaySpec.scala
@@ -4,8 +4,7 @@ package dsptools
 
 import chisel3._
 import chisel3.core.FixedPoint
-import dsptools.numbers.{DspReal, Signed}
-import dsptools.numbers.implicits._
+import dsptools.numbers._
 import org.scalatest.{FreeSpec, Matchers}
 
 import scala.collection.mutable

diff --git a/src/test/scala/dsptools/VerboseDspTesterSpec/SimpleTBwGenTypeOption.scala b/src/test/scala/dsptools/VerboseDspTesterSpec/SimpleTBwGenTypeOption.scala
@@ -7,9 +7,8 @@ import chisel3.util._
 import chisel3.internal.firrtl.{Width, BinaryPoint}
 import chisel3.experimental.FixedPoint
 import breeze.math.Complex
-import dsptools.numbers.{Real, DspReal, DspComplex}
-import dsptools.numbers.implicits._
 import dsptools.{DspTester, DspTesterOptionsManager, DspTesterOptions}
+import dsptools.numbers._
 import org.scalatest.{FlatSpec, Matchers}
 import chisel3.iotesters.TesterOptions
 

diff --git a/src/test/scala/dsptools/numbers/AbsSpec.scala b/src/test/scala/dsptools/numbers/AbsSpec.scala
@@ -6,7 +6,6 @@ import chisel3._
 import chisel3.experimental._
 import dsptools.{DspContext, DspTester, Grow, Wrap}
 import org.scalatest.{FreeSpec, Matchers}
-import dsptools.numbers.implicits._
 
 class AbsSpec extends FreeSpec with Matchers {
   "absolute value should work for all types" - {
@@ -85,4 +84,4 @@ class DoesAbs[TU <: Data: Signed : Ring, TS <: Data : Signed : Ring, TF <: Data
 
   io.fAbsGrow := DspContext.withOverflowType(Grow) { io.fIn.context_abs() }
   io.fAbsWrap := DspContext.withOverflowType(Wrap) { io.fIn.context_abs() }
-}
+}
diff --git a/src/test/scala/dsptools/numbers/ParameterizedOpSpec.scala b/src/test/scala/dsptools/numbers/ParameterizedOpSpec.scala
@@ -9,7 +9,6 @@ import chisel3.iotesters.TesterOptionsManager
 import dsptools.DspTester
 import org.scalatest.{FreeSpec, Matchers}
 import dsptools.numbers._
-import dsptools.numbers.implicits._
 import dsptools._
 
 //scalastyle:off magic.number

diff --git a/src/test/scala/dsptools/numbers/TypeclassSpec.scala b/src/test/scala/dsptools/numbers/TypeclassSpec.scala
@@ -7,7 +7,6 @@ import chisel3.experimental.FixedPoint
 import chisel3.iotesters._
 import dsptools._
 import dsptools.numbers._
-import dsptools.numbers.implicits._
 import org.scalatest.{FreeSpec, Matchers}
 
 /*

diff --git a/src/test/scala/examples/ComplexAdderSpec.scala b/src/test/scala/examples/ComplexAdderSpec.scala
@@ -6,8 +6,7 @@ import chisel3.core._
 import chisel3.iotesters.{Backend}
 import chisel3.{Bundle, Module}
 import dsptools.{DspContext, DspTester}
-import dsptools.numbers.{FixedPointRing, DspComplexRing, DspComplex}
-import dsptools.numbers.implicits._
+import dsptools.numbers._
 import org.scalatest.{Matchers, FlatSpec}
 import spire.algebra.Ring
 

diff --git a/src/test/scala/examples/Demod.scala b/src/test/scala/examples/Demod.scala
@@ -4,8 +4,7 @@ package examples
 
 import chisel3._
 import chisel3.util.log2Ceil
-import dsptools.numbers.{DspComplex, RealBits}
-import dsptools.numbers.implicits._
+import dsptools.numbers._
 
 //scalastyle:off magic.number
 

diff --git a/src/test/scala/examples/ParameterizedAdderSpec.scala b/src/test/scala/examples/ParameterizedAdderSpec.scala
@@ -6,9 +6,7 @@ import chisel3._
 import chisel3.experimental.FixedPoint
 import dsptools.DspTester
 import dsptools.numbers._
-import dsptools.numbers.implicits._
 import org.scalatest.{FlatSpec, Matchers}
-import spire.algebra.Ring
 
 //scalastyle:off magic.number
 

diff --git a/src/test/scala/examples/ParameterizedSaturatingAdder.scala b/src/test/scala/examples/ParameterizedSaturatingAdder.scala
@@ -5,7 +5,6 @@ package examples
 import chisel3._
 import dsptools.{DspContext, DspTester, Saturate}
 import dsptools.numbers._
-import dsptools.numbers.implicits._
 import org.scalatest.{FlatSpec, Matchers}
 
 class ParameterizedSaturatingAdder[T <: Data:Integer](gen:() => T) extends Module {

diff --git a/src/test/scala/examples/SimpleDspModuleSpec.scala b/src/test/scala/examples/SimpleDspModuleSpec.scala
@@ -5,9 +5,7 @@ import chisel3._
 // Allows you to use FixedPoint
 import chisel3.experimental.FixedPoint
 // If you want to take advantage of type classes >> Data:RealBits (i.e. pass in FixedPoint or DspReal)
-import dsptools.numbers.{RealBits}
-// Required for you to use operators defined via type classes (+ has special Dsp overflow behavior, etc.)
-import dsptools.numbers.implicits._
+import dsptools.numbers._
 // Enables you to set DspContext's for things like overflow behavior, rounding modes, etc.
 import dsptools.DspContext
 // Use DspTester, specify options for testing (i.e. expect tolerances on fixed point, etc.)
@@ -104,4 +102,4 @@ class SimpleDspModuleSpec extends FlatSpec with Matchers {
     } should be (true)
   }
 
-}
+}