Self Maded Card 100% Page Failed

[ITANGTANGI]

I have developed an Artix-7 PCIe USB3.0 card with M.2 interface, as shown in Figure1,2 and validated the normal operation of both the F601 and PCIe interfaces using USB3.0 loopback and PCIe RIFFA programs, as shown in Figures 3, 4, and 5. However, after porting pcileech from screamM2, I am unable to dump any memory data, resulting in a 100% failure. The device can be recognized. Shown in Figure6. Are there any specific requirements in PC settings? PC hardware: i5-12400, Windows 10 22H2.

[ufrisk]

I don't know. The ScreamerM2 code should be working if it's compatible on the FPGA PIN level. It looks like its 100% fail though in your screenshots.

If you wish you could send one my way and I could take a look at it, maybe it's something obvious, maybe its not.

[ufrisk]

Also it would be a interesting for my project to support an M2 device again... The ScreamerM2 have been out of sale for quite a long time now.

[ITANGTANGI]

Hi, thanks very much for your help, I tested it on my linux system and seems it works fine as Figure, and i'll take a more detailed tests then optimiz my hardware. It's glad to ship a board to you for offical support after optimization , you can contact me if you want : )

[ufrisk]

Nice, I'm looking forward to take a look when its ready. It looks very nice, the on/off switch as well :)

By then I might have an upgrade of PCILeech to use the full PCIe x4 interface as well, but sadly it won't be any faster since the bottleneck is the USB.

[ITANGTANGI]

Ha ha, I have completed this and made it open source ! You can check it at https://github.com/ITANGTANGI/a7_tang_m2_usb . BTW, now you can contact me with tangziming@whut.edu.cn and give me you address and i will ship you one : ) ; In the feature, it's interesting to use ktintex ultrascale chip 12.3Gbps GTX and XillyUSB (https://xillybus.com/) make a 10Gbps USB3.0 without USB-PHY for a faster connection with host.

[ITANGTANGI]

I'm sorry I made a mistake, XillyUSB only supports USB 3.0 up to 5Gbps