Skip to content
New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

Sign up for GitHub

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

Jump to bottom

Odin: add reserved keyword support in Flex and verify standard #1468

Merged
merged 6 commits into from
Aug 6, 2020
Merged

Odin: add reserved keyword support in Flex and verify standard #1468

Show file tree
Hide file tree
Changes from all commits
Commits
Show all changes
6 commits
Select commit Hold shift + click to select a range
03c614a
Odin: restricted keyword support in flex
jeanlego Aug 6, 2020
5431f9e
Odin: fix indentations to spaces between test in flex
jeanlego Aug 6, 2020
05b46cb
fix typo in error message
jeanlego Aug 6, 2020
a8f494e
initial support for signed values
jeanlego Aug 6, 2020
febb080
Odin: Remove INTEGER data type
jeanlego Aug 6, 2020
b293b87
Odin: regenerate expectation
jeanlego Aug 6, 2020
File filter

Filter by extension

Filter by extension
Conversations
Failed to load comments.
Loading
Jump to
Jump to file
Failed to load files.
Loading
Diff view
Diff view
14 changes: 6 additions & 8 deletions ODIN_II/SRC/ast_elaborate.cpp
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -1840,15 +1840,14 @@ ast_node_t* reduce_expressions(ast_node_t* node, sc_hierarchy* local_ref, long*

long sc_spot = sc_lookup_string(local_symbol_table_sc, id);
if (sc_spot > -1) {
bool is_signed = ((ast_node_t*)local_symbol_table_sc->data[sc_spot])->types.variable.is_signed;
if (!is_signed) {
VNumber* temp = node->children[1]->types.vnumber;
VNumber* to_unsigned = new VNumber(V_UNSIGNED(*temp));
node->children[1]->types.vnumber = to_unsigned;
delete temp;
operation_list signedness = ((ast_node_t*)local_symbol_table_sc->data[sc_spot])->types.variable.signedness;
VNumber* old_value = node->children[1]->types.vnumber;
if (signedness == UNSIGNED) {
node->children[1]->types.vnumber = new VNumber(V_UNSIGNED(*old_value));
} else {
/* leave as is */
node->children[1]->types.vnumber = new VNumber(V_SIGNED(*old_value));
}
delete old_value;
}
} else {
/* signed keyword is not supported, meaning unresolved values will already be handled as
Expand Down Expand Up @@ -2669,7 +2668,6 @@ void create_param_table_for_scope(ast_node_t* module_items, sc_hierarchy* local_
if (var_declare->types.variable.is_input
|| var_declare->types.variable.is_output
|| var_declare->types.variable.is_reg
|| var_declare->types.variable.is_integer
|| var_declare->types.variable.is_genvar
|| var_declare->types.variable.is_wire
|| var_declare->types.variable.is_defparam)
Expand Down
3 changes: 1 addition & 2 deletions ODIN_II/SRC/ast_util.cpp
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -166,10 +166,9 @@ ast_node_t* create_node_w_type(ids id, loc_t loc) {
new_node->types.variable.is_inout = false;
new_node->types.variable.is_wire = false;
new_node->types.variable.is_reg = false;
new_node->types.variable.is_integer = false;
new_node->types.variable.is_genvar = false;
new_node->types.variable.is_memory = false;
new_node->types.variable.is_signed = false;
new_node->types.variable.signedness = UNSIGNED;

return new_node;
}
Expand Down
11 changes: 9 additions & 2 deletions ODIN_II/SRC/enum_str.cpp
View file
Open in desktop
Original file line number Diff line number Diff line change
@@ -1,8 +1,16 @@
#include "odin_types.h"

const char* ieee_std_STR[] = {
"1364-1995",
"1364-2001-noconfig",
"1364-2001",
"1364-2005",
};

const char* file_extension_supported_STR[] = {
".v",
".vh"};
".vh",
};

const char* edge_type_e_STR[] = {
"UNDEFINED_SENSITIVITY",
Expand Down Expand Up @@ -100,7 +108,6 @@ const char* ids_STR[] = {
"INOUT",
"WIRE",
"REG",
"INTEGER",
"GENVAR",
"PARAMETER",
"LOCALPARAM",
Expand Down
13 changes: 10 additions & 3 deletions ODIN_II/SRC/include/odin_types.h
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -146,6 +146,8 @@ struct global_args_t {
/**
* defined in enum_str.cpp
*/
extern const char* ieee_std_STR[];

extern const char* file_extension_supported_STR[];

extern const char* ZERO_GND_ZERO;
Expand All @@ -159,6 +161,13 @@ extern const char* edge_type_e_STR[];
extern const char* operation_list_STR[][2];
extern const char* ids_STR[];

enum ieee_std {
ieee_1995,
ieee_2001_noconfig,
ieee_2001,
ieee_2005
};

enum file_extension_supported {
VERILOG,
VERILOG_HEADER,
Expand Down Expand Up @@ -257,7 +266,6 @@ enum ids {
INOUT,
WIRE,
REG,
INTEGER,
GENVAR,
PARAMETER,
LOCALPARAM,
Expand Down Expand Up @@ -374,10 +382,9 @@ struct typ {
short is_inout;
short is_wire;
short is_reg;
short is_integer;
short is_genvar;
short is_memory;
short is_signed;
operation_list signedness;
VNumber* initial_value = nullptr;
} variable;
struct
Expand Down
6 changes: 3 additions & 3 deletions ODIN_II/SRC/include/parse_making_ast.h
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -19,9 +19,9 @@ ast_node_t* newStringNode(char* num, loc_t loc);
ast_node_t* newList(ids type_id, ast_node_t* expression, loc_t loc);
ast_node_t* newList_entry(ast_node_t* concat_node, ast_node_t* expression);
ast_node_t* newListReplicate(ast_node_t* exp, ast_node_t* child, loc_t loc);
ast_node_t* markAndProcessPortWith(ids top_type, ids port_id, ids net_id, ast_node_t* port, bool is_signed);
ast_node_t* markAndProcessParameterWith(ids id, ast_node_t* parameter, bool is_signed);
ast_node_t* markAndProcessSymbolListWith(ids top_type, ids id, ast_node_t* symbol_list, bool is_signed);
ast_node_t* markAndProcessPortWith(ids top_type, ids port_id, ids net_id, ast_node_t* port, operation_list signedness);
ast_node_t* markAndProcessParameterWith(ids id, ast_node_t* parameter, operation_list signedness);
ast_node_t* markAndProcessSymbolListWith(ids top_type, ids id, ast_node_t* symbol_list, operation_list signedness);

/* EXPRESSIONS */
ast_node_t* newArrayRef(char* id, ast_node_t* expression, loc_t loc);
Expand Down
10 changes: 4 additions & 6 deletions ODIN_II/SRC/netlist_create_from_ast.cpp
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -735,7 +735,7 @@ void create_all_driver_nets_in_this_scope(char* instance_name_prefix, sc_hierarc
oassert(local_symbol_table[i]->type == VAR_DECLARE || local_symbol_table[i]->type == BLOCKING_STATEMENT);
if (
/* all registers are drivers */
(local_symbol_table[i]->types.variable.is_reg) || (local_symbol_table[i]->types.variable.is_integer)
(local_symbol_table[i]->types.variable.is_reg)
/* a wire that is an input can be a driver */
|| ((local_symbol_table[i]->types.variable.is_wire)
&& (!local_symbol_table[i]->types.variable.is_input))
Expand Down Expand Up @@ -1248,7 +1248,7 @@ void create_symbol_table_for_scope(ast_node_t* module_items, sc_hierarchy* local
continue;

oassert(var_declare->type == VAR_DECLARE);
oassert((var_declare->types.variable.is_input) || (var_declare->types.variable.is_output) || (var_declare->types.variable.is_reg) || (var_declare->types.variable.is_integer) || (var_declare->types.variable.is_genvar) || (var_declare->types.variable.is_wire));
oassert((var_declare->types.variable.is_input) || (var_declare->types.variable.is_output) || (var_declare->types.variable.is_reg) || (var_declare->types.variable.is_genvar) || (var_declare->types.variable.is_wire));

if (var_declare->types.variable.is_input
&& var_declare->types.variable.is_reg) {
Expand Down Expand Up @@ -1281,15 +1281,14 @@ void create_symbol_table_for_scope(ast_node_t* module_items, sc_hierarchy* local
/* check for an initial value and copy it over if found */
((ast_node_t*)local_symbol_table_sc->data[sc_spot])->types.variable.initial_value = init_value;
} else if ((var_declare->types.variable.is_reg) || (var_declare->types.variable.is_wire)
|| (var_declare->types.variable.is_integer) || (var_declare->types.variable.is_genvar)) {
|| (var_declare->types.variable.is_genvar)) {
/* copy the output status over */
((ast_node_t*)local_symbol_table_sc->data[sc_spot])->types.variable.is_wire = var_declare->types.variable.is_wire;
((ast_node_t*)local_symbol_table_sc->data[sc_spot])->types.variable.is_reg = var_declare->types.variable.is_reg;

((ast_node_t*)local_symbol_table_sc->data[sc_spot])->types.variable.is_integer = var_declare->types.variable.is_integer;
/* check for an initial value and copy it over if found */
((ast_node_t*)local_symbol_table_sc->data[sc_spot])->types.variable.initial_value = init_value;
} else if (!var_declare->types.variable.is_integer) {
} else {
abort();
}
} else {
Expand Down Expand Up @@ -1349,7 +1348,6 @@ void create_symbol_table_for_scope(ast_node_t* module_items, sc_hierarchy* local
var_declare->types.variable.is_wire = true;
var_declare->types.variable.is_reg = false;

var_declare->types.variable.is_integer = false;
var_declare->types.variable.is_input = false;

allocate_children_to_node(var_declare, {node, NULL, NULL, NULL, NULL, NULL});
Expand Down
Loading