Interface port connection using .* is wrong (?)

[veripoolbot]

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Author Name: Pierre-David Pfister
Original Redmine Issue: 320 from https://www.veripool.org
Original Date: 2011-01-27
Original Assignee: Wilson Snyder (@wsnyder)

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Hi,

It seems to me there are at least 2 problems with the .* for interfaces. E.g.

interface intf1;
  logic a;
  logic b;
  modport mp1 (input a, output b);
endinterface

interface intf2 (intf1.mp1 c);
  logic e;
endinterface

module top;
  intf1 c(.*);
  intf2 f(.*);
endmodule

First, some comments are left out when saving the file after C-c C-a (this is cosmetics, but is a little annoying).

Second, I'm not sure the internal declarations (i.e. not the port declarations) should be in the interface connection. I think it should not since these are not interface ports. When I try to compile, it produces compilation error. E.g. Signals 'a' and 'b' for c interface instantiation in 'top' should not be in the interface connection, same for signal 'e' for 'f' interface instantiation in 'top'.

Thanks,

Pierre

[veripoolbot]

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Original Redmine Comment
Author Name: Wilson Snyder (@wsnyder)
Original Date: 2011-01-27T21:56:58Z

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#2 needs more thought, right now it's a side effect of how AUTOINST works, which simply isn't right.

I just fixed 1, I can make a release now if you want it.

[veripoolbot]

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Original Redmine Comment
Author Name: Wilson Snyder (@wsnyder)
Original Date: 2015-03-13T22:26:51Z

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The interface issue discusses was fixed somewhere along the line - a and b no longer appear.