Correct number of channels that can be processed using DS3 function

[samchesney]

From @ed-xmos:

(1/16000)/6.24e-6 - 10.016, so we can squeeze 10 in theoretically.
My mistake - I should have re-calculated this bit

WRT:
The DS3 processing takes up to 389 core cycles to compute a sample which translates to 3.89us at 100MHz or 6.224us at 62.5MHz core speed. This permits up to 9 channels of 48KHz -> 16KHz sample rate conversion in a single 62.5MHz core.

Raised in feedback of pull request #4.

[mbanth]

The referenced documentation file no longer exists at the head of either the develop or the master branch. Closing this issue as a result.