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Multiple cycle cpu(using verilog) based on MIPS.

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zxhero/MIPS-CPU

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LICENSE
LICENSE
 
 
README.md
README.md
 
 
axi_lite_if
axi_lite_if
 
 
axi_master.v
axi_master.v
 
 
dma_engine.v
dma_engine.v
 
 
interrupt_control.v
interrupt_control.v
 
 
mips_cpu_top.v
mips_cpu_top.v
 
 
mk.tcl
mk.tcl
 
 
requst_select.v
requst_select.v
 
 
zynq_soc.tcl
zynq_soc.tcl
 
 

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Multiple Cycle CPU

Multiple cycle cpu(using verilog) based on MIPS, includes ALU, REGISTERS FILE, DMA and Interrupt handler, fully tested. I have run it on ZYNQ board.

I upload whole vivado project.

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Multiple cycle cpu(using verilog) based on MIPS.

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verilog mips32cpu multicycle-processor

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