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ARX-0/README.md

HELLO I AM @ARX-0

I’m working in RTL coding/ GDSII design and VLSI design

I’m currently a prefinal year @ RMKEC, walking and wandering deeper into the world of digital design

GIF

I’m open to collaboration on projects related to digital circuit design and VLSI

You can reach me on LinkedIn

tldr:- Gonna step into my 3rd year of college sooner as an electronics and communication student
Currently working on my C/CPP skills
Have done projets in Verilog vhdl
Interested to do RTL to GDSll in the future (i might need help with it)

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  1. RISC-V_single_cycle_processor RISC-V_single_cycle_processor Public

    This is a implementation of a RISC-V single cycle processor

    Verilog 3

  2. VSDSquadraonMini_Research_intern VSDSquadraonMini_Research_intern Public

    VSDSquadraonMini_Research_intern_repo {I made the pinout diagram for the squadron mini :) } (for documenting/accounting the progression of the internship)

    C++ 1

  3. HARDWARE_101 HARDWARE_101 Public

    follow this repo complete the tasks and learn RTL_coding

    Tcl 7

  4. HLS-pynq HLS-pynq Public

    this repo gives you a progressive view upon making optimisations on HLS and implementation on the PYNQ-Z2 board

    C++