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My VHDL Projects

CC BY-NC-SA 4.0

This work is licensed under a Creative Commons Attribution-NonCommercial-ShareAlike 4.0 International License.

CC BY-NC-SA 4.0

VHDL (VHSIC Hardware Description Language) is becoming increasingly popular as a way to capture complex digital electronic circuits for both simulation and synthesis. Digital circuits captured using VHDL can be easily simulated, are more likely to be synthesizable into multiple target technologies, and can be archived for later modification and reuse. In his introduction to A VHDL Primer (Prentice Hall, 1992), Jayaram Bhasker writes, "VHDL is a large and complex language with many complex constructs that have complex semantic meanings...". This statement, with its possibly record-breaking three instances of the word "complex", reflects a common and for the most part correct perception about VHDL: it is a large and complicated language.

VHDL is a rich and powerful language. But is VHDL really so hard to learn and use? VHDL is not impenetrable, if you follow well-established coding conventions and borrow liberally from sample circuits such as those found in this introduction.


Compiler (IDE) used / programs were tested on : https://www.intel.com/content/www/us/en/software/programmable/quartus-prime/download.html

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