- 👋 Hi, I’m @Andy-wang1988 I'm a digital chip verification engieer
- 👀 I’m interested in ...
- 🌱 I’m currently learning verilog,Systemverilog,C/C++,python and UVM
- 💞️ I’m looking to collaborate on ...
- 📫 How to reach me ... if need to contact with me,send e-mail to w15602321758@163.com
Popular repositories Loading
-
automatminer
automatminer PublicForked from hackingmaterials/automatminer
An automatic engine for predicting materials properties.
Python 1
-
-
-
MUX-Verilog
MUX-Verilog PublicForked from tanmay-mohapatra/MUX-Verilog
Designing MUX 4:1 using verilog HDL
-
Something went wrong, please refresh the page to try again.
If the problem persists, check the GitHub status page or contact support.
If the problem persists, check the GitHub status page or contact support.