-
Notifications
You must be signed in to change notification settings - Fork 55
New issue
Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.
By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.
Already on GitHub? Sign in to your account
MOVSS use wrong operand types #23
Comments
Kashio
added a commit
to Kashio/x86reference
that referenced
this issue
Dec 24, 2022
Kashio
added a commit
to Kashio/x86reference
that referenced
this issue
Dec 24, 2022
Thanks for your review. However, this is similar to #22. The type |
This was referenced Dec 21, 2023
Feel free to reopen this issue if you still think the operand type is wrong. |
Sign up for free
to join this conversation on GitHub.
Already have an account?
Sign in to comment
Right now
MOVSS
encoded with opcodeF3 0F 10
orF3 0F 11
use operand typess
for its operand of addressingW
which is defined as:According to the intel docs:
Since it's only copying the lower 32 bits of the register and the memory variant is also referencing 32 bit memory the operand type should be of type
d
which is defined as:The text was updated successfully, but these errors were encountered: