Repo for Comp Sys 701 Group Research Project
Various VHDL blocks in our processor design. Should contain all the different processor blocks and containers.
Related components (entities, components, and containers) should be grouped in their own folders.
Any documentation or reports related to this assignment
Files for running our processor design in Quartus and Model Sim.
Contains a Quartus project for running on NIOS II and a ModelSim project For final ReCOP compilation.
ModelSim project and VHDL files for testing the various components.
Components are stored in \Components and the test files are stored in \TestBenches