This repository has been archived by the owner on Mar 20, 2023. It is now read-only.
-
Notifications
You must be signed in to change notification settings - Fork 39
/
netstim.mod
411 lines (372 loc) · 10.4 KB
/
netstim.mod
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
350
351
352
353
354
355
356
357
358
359
360
361
362
363
364
365
366
367
368
369
370
371
372
373
374
375
376
377
378
379
380
381
382
383
384
385
386
387
388
389
390
391
392
393
394
395
396
397
398
399
400
401
402
403
404
405
406
407
408
409
410
: $Id: netstim.mod 2212 2008-09-08 14:32:26Z hines $
: comments at end
: the Random idiom has been extended to support CoreNEURON.
: For backward compatibility, noiseFromRandom(hocRandom) can still be used
: as well as the default low-quality scop_exprand generator.
: However, CoreNEURON will not accept usage of the low-quality generator,
: and, if noiseFromRandom is used to specify the random stream, that stream
: must be using the Random123 generator.
: The recommended idiom for specfication of the random stream is to use
: noiseFromRandom123(id1, id2[, id3])
: If any instance uses noiseFromRandom123, then no instance can use noiseFromRandom
: and vice versa.
NEURON {
ARTIFICIAL_CELL NetStim
RANGE interval, number, start
RANGE noise
THREADSAFE : only true if every instance has its own distinct Random
BBCOREPOINTER donotuse
}
PARAMETER {
interval = 10 (ms) <1e-9,1e9>: time between spikes (msec)
number = 10 <0,1e9> : number of spikes (independent of noise)
start = 50 (ms) : start of first spike
noise = 0 <0,1> : amount of randomness (0.0 - 1.0)
}
ASSIGNED {
event (ms)
on
ispike
donotuse
}
VERBATIM
#if NRNBBCORE /* running in CoreNEURON */
#define IFNEWSTYLE(arg) arg
#else /* running in NEURON */
/*
1 means noiseFromRandom was called when _ran_compat was previously 0 .
2 means noiseFromRandom123 was called when _ran_compat was previously 0.
*/
static int _ran_compat; /* specifies the noise style for all instances */
#define IFNEWSTYLE(arg) if(_ran_compat == 2) { arg }
#endif /* running in NEURON */
ENDVERBATIM
:backward compatibility
PROCEDURE seed(x) {
VERBATIM
#if !NRNBBCORE
ENDVERBATIM
set_seed(x)
VERBATIM
#endif
ENDVERBATIM
}
INITIAL {
VERBATIM
if (_p_donotuse) {
/* only this style initializes the stream on finitialize */
IFNEWSTYLE(nrnran123_setseq((nrnran123_State*)_p_donotuse, 0, 0);)
}
ENDVERBATIM
on = 0 : off
ispike = 0
if (noise < 0) {
noise = 0
}
if (noise > 1) {
noise = 1
}
if (start >= 0 && number > 0) {
on = 1
: randomize the first spike so on average it occurs at
: start + noise*interval
event = start + invl(interval) - interval*(1. - noise)
: but not earlier than 0
if (event < 0) {
event = 0
}
net_send(event, 3)
}
}
PROCEDURE init_sequence(t(ms)) {
if (number > 0) {
on = 1
event = 0
ispike = 0
}
}
FUNCTION invl(mean (ms)) (ms) {
if (mean <= 0.) {
mean = .01 (ms) : I would worry if it were 0.
}
if (noise == 0) {
invl = mean
}else{
invl = (1. - noise)*mean + noise*mean*erand()
}
}
VERBATIM
#include "nrnran123.h"
#if !NRNBBCORE
/* backward compatibility */
double nrn_random_pick(void* r);
void* nrn_random_arg(int argpos);
int nrn_random_isran123(void* r, uint32_t* id1, uint32_t* id2, uint32_t* id3);
int nrn_random123_setseq(void* r, uint32_t seq, char which);
int nrn_random123_getseq(void* r, uint32_t* seq, char* which);
#endif
ENDVERBATIM
FUNCTION erand() {
VERBATIM
if (_p_donotuse) {
/*
:Supports separate independent but reproducible streams for
: each instance. However, the corresponding hoc Random
: distribution MUST be set to Random.negexp(1)
*/
#if !NRNBBCORE
if (_ran_compat == 2) {
_lerand = nrnran123_negexp((nrnran123_State*)_p_donotuse);
}else{
_lerand = nrn_random_pick(_p_donotuse);
}
#else
_lerand = nrnran123_negexp((nrnran123_State*)_p_donotuse);
#endif
return _lerand;
}else{
#if NRNBBCORE
assert(0);
#else
/*
: the old standby. Cannot use if reproducible parallel sim
: independent of nhost or which host this instance is on
: is desired, since each instance on this cpu draws from
: the same stream
*/
#endif
}
#if !NRNBBCORE
ENDVERBATIM
erand = exprand(1)
VERBATIM
#endif
ENDVERBATIM
}
PROCEDURE noiseFromRandom() {
VERBATIM
#if !NRNBBCORE
{
void** pv = (void**)(&_p_donotuse);
if (_ran_compat == 2) {
fprintf(stderr, "NetStim.noiseFromRandom123 was previously called\n");
assert(0);
}
_ran_compat = 1;
if (ifarg(1)) {
*pv = nrn_random_arg(1);
}else{
*pv = (void*)0;
}
}
#endif
ENDVERBATIM
}
PROCEDURE noiseFromRandom123() {
VERBATIM
#if !NRNBBCORE
{
nrnran123_State** pv = (nrnran123_State**)(&_p_donotuse);
if (_ran_compat == 1) {
fprintf(stderr, "NetStim.noiseFromRandom was previously called\n");
assert(0);
}
_ran_compat = 2;
if (*pv) {
nrnran123_deletestream(*pv);
*pv = (nrnran123_State*)0;
}
if (ifarg(3)) {
*pv = nrnran123_newstream3((uint32_t)*getarg(1), (uint32_t)*getarg(2), (uint32_t)*getarg(3));
}else if (ifarg(2)) {
*pv = nrnran123_newstream((uint32_t)*getarg(1), (uint32_t)*getarg(2));
}
}
#endif
ENDVERBATIM
}
DESTRUCTOR {
VERBATIM
if (!noise) { return; }
if (_p_donotuse) {
#if NRNBBCORE
{ /* but note that mod2c does not translate DESTRUCTOR */
#else
if (_ran_compat == 2) {
#endif
nrnran123_State** pv = (nrnran123_State**)(&_p_donotuse);
nrnran123_deletestream(*pv);
*pv = (nrnran123_State*)0;
}
}
ENDVERBATIM
}
VERBATIM
static void bbcore_write(double* x, int* d, int* xx, int *offset, _threadargsproto_) {
if (!noise) { return; }
/* error if using the legacy scop_exprand */
if (!_p_donotuse) {
fprintf(stderr, "NetStim: cannot use the legacy scop_negexp generator for the random stream.\n");
assert(0);
}
if (d) {
char which;
uint32_t* di = ((uint32_t*)d) + *offset;
#if !NRNBBCORE
if (_ran_compat == 1) {
void** pv = (void**)(&_p_donotuse);
/* error if not using Random123 generator */
if (!nrn_random_isran123(*pv, di, di+1, di+2)) {
fprintf(stderr, "NetStim: Random123 generator is required\n");
assert(0);
}
nrn_random123_getseq(*pv, di+3, &which);
di[4] = (int)which;
}else{
#else
{
#endif
nrnran123_State** pv = (nrnran123_State**)(&_p_donotuse);
nrnran123_getids3(*pv, di, di+1, di+2);
nrnran123_getseq(*pv, di+3, &which);
di[4] = (int)which;
#if NRNBBCORE
/* CORENeuron does not call DESTRUCTOR so... */
nrnran123_deletestream(*pv);
*pv = (nrnran123_State*)0;
#endif
}
/*printf("Netstim bbcore_write %d %d %d\n", di[0], di[1], di[3]);*/
}
*offset += 5;
}
static void bbcore_read(double* x, int* d, int* xx, int* offset, _threadargsproto_) {
if (!noise) { return; }
/* Generally, CoreNEURON, in the context of psolve, begins with
an empty model so this call takes place in the context of a freshly
created instance and _p_donotuse is not NULL.
However, this function
is also now called from NEURON at the end of coreneuron psolve
in order to transfer back the nrnran123 sequence state. That
allows continuation with a subsequent psolve within NEURON or
properly transfer back to CoreNEURON if we continue the psolve
there. So now, extra logic is needed for this call to work in
a NEURON context.
*/
uint32_t* di = ((uint32_t*)d) + *offset;
#if NRNBBCORE
nrnran123_State** pv = (nrnran123_State**)(&_p_donotuse);
assert(!_p_donotuse);
*pv = nrnran123_newstream3(di[0], di[1], di[2]);
nrnran123_setseq(*pv, di[3], (char)di[4]);
#else
uint32_t id1, id2, id3;
assert(_p_donotuse);
if (_ran_compat == 1) { /* Hoc Random.Random123 */
void** pv = (void**)(&_p_donotuse);
int b = nrn_random_isran123(*pv, &id1, &id2, &id3);
assert(b);
nrn_random123_setseq(*pv, di[3], (char)di[4]);
}else{
assert(_ran_compat == 2);
nrnran123_State** pv = (nrnran123_State**)(&_p_donotuse);
nrnran123_getids3(*pv, &id1, &id2, &id3);
nrnran123_setseq(*pv, di[3], (char)di[4]);
}
/* Random123 on NEURON side has same ids as on CoreNEURON side */
assert(di[0] == id1 && di[1] == id2 && di[2] == id3);
#endif
*offset += 5;
}
ENDVERBATIM
PROCEDURE next_invl() {
if (number > 0) {
event = invl(interval)
}
if (ispike >= number) {
on = 0
}
}
NET_RECEIVE (w) {
if (flag == 0) { : external event
if (w > 0 && on == 0) { : turn on spike sequence
: but not if a netsend is on the queue
init_sequence(t)
: randomize the first spike so on average it occurs at
: noise*interval (most likely interval is always 0)
next_invl()
event = event - interval*(1. - noise)
net_send(event, 1)
}else if (w < 0) { : turn off spiking definitively
on = 0
}
}
if (flag == 3) { : from INITIAL
if (on == 1) { : but ignore if turned off by external event
init_sequence(t)
net_send(0, 1)
}
}
if (flag == 1 && on == 1) {
ispike = ispike + 1
net_event(t)
next_invl()
if (on == 1) {
net_send(event, 1)
}
}
}
FUNCTION bbsavestate() {
bbsavestate = 0
: limited to noiseFromRandom123
VERBATIM
#if !NRNBBCORE
if (_ran_compat == 2) {
nrnran123_State** pv = (nrnran123_State**)(&_p_donotuse);
if (!*pv) { return 0.0; }
char which;
uint32_t seq;
double *xdir, *xval;
xdir = hoc_pgetarg(1);
if (*xdir == -1.) { *xdir = 2; return 0.0; }
xval = hoc_pgetarg(2);
if (*xdir == 0.) {
nrnran123_getseq(*pv, &seq, &which);
xval[0] = (double)seq;
xval[1] = (double)which;
}
if (*xdir == 1) {
nrnran123_setseq(*pv, (uint32_t)xval[0], (char)xval[1]);
}
} /* else do nothing */
#endif
ENDVERBATIM
}
COMMENT
Presynaptic spike generator
---------------------------
This mechanism has been written to be able to use synapses in a single
neuron receiving various types of presynaptic trains. This is a "fake"
presynaptic compartment containing a spike generator. The trains
of spikes can be either periodic or noisy (Poisson-distributed)
Parameters;
noise: between 0 (no noise-periodic) and 1 (fully noisy)
interval: mean time between spikes (ms)
number: number of spikes (independent of noise)
Written by Z. Mainen, modified by A. Destexhe, The Salk Institute
Modified by Michael Hines for use with CVode
The intrinsic bursting parameters have been removed since
generators can stimulate other generators to create complicated bursting
patterns with independent statistics (see below)
Modified by Michael Hines to use logical event style with NET_RECEIVE
This stimulator can also be triggered by an input event.
If the stimulator is in the on==0 state (no net_send events on queue)
and receives a positive weight
event, then the stimulator changes to the on=1 state and goes through
its entire spike sequence before changing to the on=0 state. During
that time it ignores any positive weight events. If, in an on!=0 state,
the stimulator receives a negative weight event, the stimulator will
change to the on==0 state. In the on==0 state, it will ignore any ariving
net_send events. A change to the on==1 state immediately fires the first spike of
its sequence.
ENDCOMMENT