Here there are the laboratory project made by Angela Bernunzo, Fabio Busignani and Emanuele Gianoglio for the Integrated System Architecture course, Politecnico di Torino, Turin, Italy.

1) Design of a FIR filter adopting pipeline technique to achieve the given clock frequency. The softwares exploited are Modelsim and Synopsys.
2) Design of an architecture which implements DCT, using TTA architecture. The software used is TCE, exploited for statistic approach in order to optimize the algorithm. 
3) Design of an ACS (Add-Compare-Select) unit. The architecture was described in SystemC. Modelsim, G++ compiler and GTKWave have been exploited to simulate the architecture.