Scripts can now run independent of firmware. Fix for #18. Added pc-sim

[zettasticks]

The scripts in the python folder are used to transfer data. If called before the board is ready, they wait in a loop, until the board reaches the point of transfer. This way it makes it possible to automatize multiple transfers as well as making the scripts easier to use. An example of their usage is present on the Makefile.

Also added pc-sim. The makefile also showcases how to call the scripts in order to test the pc-sim code.

[P-Miranda]

Running

make sim

Gives the following output:

make -C hardware/simulation/icarus run
make[1]: Entering directory `/home/pmiranda/sandbox/iob-eth/hardware/simulation/icarus'
iverilog -W all -g2005-sv -I ../../../submodules/INTERCON/hardware/include -I ../../../submodules/LIB/hardware/include -I ../../../hardware/include -DETH_DMA  -DVCD ../../../submodules/INTERCON/hardware/src/merge.v ../../../submodules/INTERCON/hardware/src/split.v ../../../submodules/DMA/hardware/src/dma_transfer.v ../../../submodules/DMA/hardware/src/dma_axi_w.v ../../../submodules/DMA/hardware/src/dma_axi.v ../../../submodules/DMA/hardware/src/dma_axi_r.v ../../../hardware/src/iob_eth_crc.v ../../../hardware/src/mem_burst.v ../../../hardware/src/iob_eth.v ../../../hardware/src/iob_eth_tx.v ../../../hardware/src/iob_eth_rx.v ../../../hardware/src/iob_eth_tb_gen.v ../../../hardware/testbench/dma_tb.v
../../../hardware/testbench/dma_tb.v:149: error: Unknown module type: iob_eth_alt_s2p_mem
../../../hardware/testbench/dma_tb.v:184: error: Unknown module type: iob_eth_alt_s2p_mem
../../../hardware/src/iob_eth.v:392: error: Unknown module type: iob_2p_async_mem
../../../hardware/src/iob_eth.v:427: error: Unknown module type: iob_2p_async_mem
9 error(s) during elaboration.
*** These modules were missing:
        iob_2p_async_mem referenced 2 times.
        iob_eth_alt_s2p_mem referenced 2 times.
***
make[1]: *** [a.out] Error 9
make[1]: Leaving directory `/home/pmiranda/sandbox/iob-eth/hardware/simulation/icarus'
make: *** [sim] Error 2

The default simulation runs what seems to be a dma test (dma_tb.v), which uses two instances of a module called iob_eth_alt_s2p_mem which is not present in the repository sources or any of the submodules.

Could you provide a working target to test the repository operation?