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IlyaChichkov/README.md

👋 Hi there, I'm Ilya!

About me

Student of Moscow National Research University of Electronic Technology. Currently studying hardware, FPGA, low level programming languages and OS architecture. Working on the study project of RISC-V CPU. Also have small experience in web development.

Statistics

GitHub stats Top Langs

Skills

List of activities on which my knowledge spread:

  • 🖥️ Software development on Visual Studio and QT;
  • ⚙️ Hardware programms for Raspberry PI, STM32, Nexus A7;
  • 🎮 Unity game engine (Mobile games with ADS, monitization);
  • 🎨 Web design (Adobe Photoshop, Illustrator; Figma);
  • 🕸️ Web applications (Vue, TypeScript, SCSS, TailWind-CSS, Firebase);

Projects

CPU Card OS project Card Verilog Practice

https://fork-github-readme-stats-9v9p8has5-ilya555chich-yandexru.vercel.app

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  1. freeos_uart_transactions freeos_uart_transactions Public

    Transactions system for sending data by UART and using FreeOS

    C

  2. MIET-OS-Labs-2022 MIET-OS-Labs-2022 Public

    Shell

  3. RISC_V-CPU RISC_V-CPU Public

    Educational project which goal is realization of processor with RISC-V architecture.

    SystemVerilog

  4. Verilog_Labs_2023 Verilog_Labs_2023 Public

    Verilog & C Language practice

    SystemVerilog