CO_MIPS54

实现MIPS架构指令集下54条指令的单周期CPU，经过Vivado和Modelsim联合仿真通过并在Nexys4开发板上下板通过。

Name		Name	Last commit message	Last commit date
Latest commit History 5 Commits
ALU.v		ALU.v
CP0.v		CP0.v
Cause_list.v		Cause_list.v
Counter.v		Counter.v
DIV.v		DIV.v
DIVU.v		DIVU.v
DMEM.v		DMEM.v
Divider.v		Divider.v
HiLo.v		HiLo.v
Loader.v		Loader.v
MIPS 54条指令单周期CPU设计说明.pdf		MIPS 54条指令单周期CPU设计说明.pdf
MIPS_CPU.v		MIPS_CPU.v
MULT.v		MULT.v
MULTU.v		MULTU.v
Multifier.v		Multifier.v
README.md		README.md
add.v		add.v
add4.v		add4.v
add8.v		add8.v
bing.v		bing.v
cpu_tb.v		cpu_tb.v
dist_mem_gen_v8_0.v		dist_mem_gen_v8_0.v
ext16.v		ext16.v
ext18.v		ext18.v
ext5.v		ext5.v
imem.mif		imem.mif
imem.v		imem.v
instrcution_decoder.v		instrcution_decoder.v
micro_operation_producer.v		micro_operation_producer.v
mux_1_2.v		mux_1_2.v
mux_2_4.v		mux_2_4.v
pcreg.v		pcreg.v
pcreg2.v		pcreg2.v
regfile.v		regfile.v
s_ext16.v		s_ext16.v
sccomp_dataflow.v		sccomp_dataflow.v

Provide feedback