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LLVM target initialization bindings for AArch64, ARM, AVR, Mips, PPC & WASM #936

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merged 1 commit into from
Nov 9, 2023
Merged

LLVM target initialization bindings for AArch64, ARM, AVR, Mips, PPC & WASM #936

merged 1 commit into from
Nov 9, 2023

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KitsuneAlex
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@KitsuneAlex KitsuneAlex commented Oct 27, 2023

As the title says, this PR adds target initialization bindings for some major CPU architectures which are missing in the LLVM module at the moment. Cheers.

@KitsuneAlex KitsuneAlex changed the title Target initialization bindings on AArch64, ARM, AVR, Mips, PPC & WASM Target initialization bindings for AArch64, ARM, AVR, Mips, PPC & WASM Oct 27, 2023
@KitsuneAlex KitsuneAlex changed the title Target initialization bindings for AArch64, ARM, AVR, Mips, PPC & WASM LLVM target initialization bindings for AArch64, ARM, AVR, Mips, PPC & WASM Oct 27, 2023
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@Spasi would be nice if you could take a look at this :)

Added: AArch64, AMDGPU, ARM, Mips, PowerPC, RISCV, WebAssembly.
@Spasi Spasi merged commit 9734ed2 into LWJGL:master Nov 9, 2023
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Spasi commented Nov 9, 2023

Thank you @KitsuneAlex!

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