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  1. Raft Raft Public

    An implementation of the Raft consensus protocol.

    Makefile 3 3

  2. Mxstar-compiler Mxstar-compiler Public

    Mx* Compiler Project for SJTU MS208

    Java 1

  3. risc-v-cpu risc-v-cpu Public

    A 32-bit RISC-V CPU with 5-stage pipeline implemented in Verilog HDL.

    Verilog 5

  4. RISCV-Simulator RISCV-Simulator Public

    PPCA 2019

    C++ 1