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finite-state-machine-
finite-state-machine- PublicDesign a finite state machine (FSM) with at least 9 states. You decide the inputs and outputs. There must be inputs and outputs (Cannot just transition automatically every clock cycle). Draw the st…
SystemVerilog
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8-bit-Binary-to-Gray-
8-bit-Binary-to-Gray- PublicThe SV code for an 8-bit Binary-to-Gray code converter in the dataflow model using continuous assignments
SystemVerilog
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8-bit-Gary-to-Binary-
8-bit-Gary-to-Binary- PublicSV code for an 8-bit Gary-to-Binary code converter using always_comb
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comparator
comparator PublicA comparator is a logic macro circuit that compares the magnitude of two n-bit binary operands. A 20-bit comparator determines if a 20-bit vector a[19:0] is equal to a 20-bit vector b[19:0]. Here i…
SystemVerilog
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