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ladder, volume, etc
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Kitrinx committed Oct 3, 2019
1 parent 186ee65 commit 195d16c
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Showing 5 changed files with 92 additions and 59 deletions.
29 changes: 19 additions & 10 deletions Genesis.sv
Original file line number Diff line number Diff line change
Expand Up @@ -73,7 +73,7 @@ module emu
//ADC
inout [3:0] ADC_BUS,

//SD-SPI
//SD-SPI
output SD_SCK,
output SD_MOSI,
input SD_MISO,
Expand Down Expand Up @@ -116,10 +116,10 @@ module emu
// Open-drain User port.
// 0 - D+/RX
// 1 - D-/TX
// 2..6 - USR2..USR6
// 2..6 - USR2..USR6
// Set USER_OUT to 1 to read from USER_IN.
input [6:0] USER_IN,
output [6:0] USER_OUT,
input [6:0] USER_IN,
output [6:0] USER_OUT,

input OSD_STATUS
);
Expand Down Expand Up @@ -173,6 +173,13 @@ assign LED_USER = cart_download | sav_pending;

//`define SOUND_DBG

// Status Bit Map:
// Upper Lower
// 0 1 2 3 4 5 6
// 01234567890123456789012345678901 23456789012345678901234567890123
// 0123456789ABCDEFGHIJKLMNOPQRSTUV 1234567890abcdefghijklmnopqrstuv
// XXXXXXXXXXXX XXXXXXXXXXXXXXXXXXX

`include "build_id.v"
localparam CONF_STR = {
"Genesis;;",
Expand All @@ -195,6 +202,7 @@ localparam CONF_STR = {
"OT,Border,No,Yes;",
"-;",
"OEF,Audio Filter,Model 1,Model 2,Minimal,No Filter;",
"OB,FM Chip,YM2612,YM3438;",
"ON,HiFi PCM,No,Yes;",
"-;",
"O4,Swap Joysticks,No,Yes;",
Expand All @@ -204,11 +212,11 @@ localparam CONF_STR = {
"OK,Mouse Flip Y,No,Yes;",
"-;",
"OPQ,CPU Turbo,None,Medium,High;",
"OR,Sprite Limit,Normal,High;",
"OV,Sprite Limit,Normal,High;",
"-;",
`ifdef SOUND_DBG
"OB,Enable FM,Yes,No;",
"OC,Enable PSG,Yes,No;",
"OR,Enable FM,Yes,No;",
"OS,Enable PSG,Yes,No;",
`endif
"R0,Reset;",
"J1,A,B,C,Start,Mode,X,Y,Z;",
Expand Down Expand Up @@ -401,16 +409,17 @@ system system
.MOUSE_OPT(status[20:18]),

`ifdef SOUND_DBG
.ENABLE_FM(~status[11]),
.ENABLE_PSG(~status[12]),
.ENABLE_FM(~status[27]),
.ENABLE_PSG(~status[28]),
`else
.ENABLE_FM(1),
.ENABLE_PSG(1),
`endif
.EN_HIFI_PCM(status[23]), // Option "N"
.LADDER(~status[11]),
.LPF_MODE(status[15:14]),

.OBJ_LIMIT_HIGH(status[27]),
.OBJ_LIMIT_HIGH(status[31]),

.BRAM_A({sd_lba[6:0],sd_buff_addr}),
.BRAM_DI(sd_buff_dout),
Expand Down
2 changes: 2 additions & 0 deletions jt12/jt12.v
Original file line number Diff line number Diff line change
Expand Up @@ -35,6 +35,7 @@ module jt12 (
output irq_n,
// configuration
input en_hifi_pcm,
input ladder,
// combined output
output signed [15:0] snd_right,
output signed [15:0] snd_left,
Expand All @@ -55,6 +56,7 @@ jt12_top u_jt12(
.irq_n ( irq_n ),
// configuration
.en_hifi_pcm ( en_hifi_pcm ),
.ladder ( ladder ),
// Unused ADPCM pins
.adpcma_addr ( ), // real hardware has 10 pins multiplexed through RMPX pin
.adpcma_bank ( ),
Expand Down
46 changes: 23 additions & 23 deletions jt12/jt12_acc.v
Original file line number Diff line number Diff line change
Expand Up @@ -37,6 +37,8 @@ module jt12_acc(
input rst,
input clk,
input clk_en,
input ladder,
input channel_en,
input signed [8:0] op_result,
input [ 1:0] rl,
input zero,
Expand All @@ -49,8 +51,8 @@ module jt12_acc(
input pcm_en, // only enabled for channel 6
input signed [8:0] pcm,
// combined output
output reg signed [11:0] left,
output reg signed [11:0] right
output reg signed [15:0] left,
output reg signed [15:0] right
);

reg sum_en;
Expand All @@ -72,38 +74,36 @@ always @(posedge clk) if(clk_en)

wire use_pcm = ch6op && pcm_en;
wire sum_or_pcm = sum_en | use_pcm;
wire left_en = rl[1];
wire right_en= rl[0];
wire signed [8:0] pcm_data = pcm_sum ? pcm : 9'd0;
wire [8:0] acc_input = use_pcm ? pcm_data : op_result;

wire signed [8:0] acc_input = ~channel_en ? 9'd0 : (use_pcm ? pcm_data : op_result);

// Continuous output
wire signed [11:0] pre_left, pre_right;
jt12_single_acc #(.win(9),.wout(12)) u_left(
wire signed [8:0] acc_out;
jt12_single_acc #(.win(9),.wout(9)) u_acc(
.clk ( clk ),
.clk_en ( clk_en ),
.op_result ( acc_input ),
.sum_en ( sum_or_pcm & left_en ),
.sum_en ( sum_or_pcm ),
.zero ( zero ),
.snd ( pre_left )
.snd ( acc_out )
);

jt12_single_acc #(.win(9),.wout(12)) u_right(
.clk ( clk ),
.clk_en ( clk_en ),
.op_result ( acc_input ),
.sum_en ( sum_or_pcm & right_en ),
.zero ( zero ),
.snd ( pre_right )
);
wire signed [15:0] acc_expand = {{7{acc_out[8]}}, acc_out};

reg [1:0] rl_latch, rl_old;

wire signed [4:0] ladder_left = ~ladder ? 5'd0 : (acc_expand >= 0 ? 5'd7 : (rl_old[1] ? 5'd0 : -5'd6));
wire signed [4:0] ladder_right = ~ladder ? 5'd0 : (acc_expand >= 0 ? 5'd7 : (rl_old[0] ? 5'd0 : -5'd6));

// Output can be amplied by 8/6=1.33 to use full range
// an easy alternative is to add 1/4th and get 1.25 amplification
//////This is unsafe to do. The accumulator is adding operators, not channels (up to 24, not 6).
//////Also, if this was safe, I believe this should be adding pre_left and pre_right, not left and right.
always @(posedge clk) if(clk_en) begin
left <= pre_left - { {2{pre_left [11]}}, pre_left [11:2] };
right <= pre_right - { {2{pre_right[11]}}, pre_right[11:2] };
if (channel_en)
rl_latch <= rl;
if (zero)
rl_old <= rl_latch;

left <= rl_old[1] ? acc_expand + ladder_left : ladder_left;
right <= rl_old[0] ? acc_expand + ladder_right : ladder_right;
end

endmodule
58 changes: 35 additions & 23 deletions jt12/jt12_top.v
Original file line number Diff line number Diff line change
Expand Up @@ -32,6 +32,7 @@ module jt12_top (
input [1:0] addr,
input cs_n,
input wr_n,
input ladder,

output [7:0] dout,
output irq_n,
Expand Down Expand Up @@ -559,11 +560,17 @@ assign op_result_hd = 'd0;
`endif

/* verilator tracing_on */
genvar i;
wire signed [15:0] accum_r[7];
wire signed [15:0] accum_l[7];

assign fm_snd_left = accum_l[0] + accum_l[1] + accum_l[2] + accum_l[4] + accum_l[5] + accum_l[6];
assign fm_snd_right = accum_r[0] + accum_r[1] + accum_r[2] + accum_r[4] + accum_r[5] + accum_r[6];

generate
if( use_pcm==1 ) begin: gen_pcm_acc // YM2612 accumulator
assign fm_snd_right[3:0] = 4'd0;
assign fm_snd_left [3:0] = 4'd0;
//assign fm_snd_right[3:0] = 4'd0;
//assign fm_snd_left [3:0] = 4'd0;
assign snd_sample = zero;
reg signed [8:0] pcm2;

Expand Down Expand Up @@ -607,27 +614,32 @@ generate
assign pcm2 = pcm;
`endif

jt12_acc u_acc(
.rst ( rst ),
.clk ( clk ),
.clk_en ( clk_en ),
.op_result ( op_result ),
.rl ( rl ),
// note that the order changes to deal
// with the operator pipeline delay
.zero ( zero ),
.s1_enters ( s2_enters ),
.s2_enters ( s1_enters ),
.s3_enters ( s4_enters ),
.s4_enters ( s3_enters ),
.ch6op ( ch6op ),
.pcm_en ( pcm_en ), // only enabled for channel 6
.pcm ( pcm2 ),
.alg ( alg_I ),
// combined output
.left ( fm_snd_left [15:4] ),
.right ( fm_snd_right[15:4] )
);
for (i = 0; i < 7; i = i + 1) begin : accumulator_block
jt12_acc u_acc(
.rst ( rst ),
.clk ( clk ),
.clk_en ( clk_en ),
.channel_en (cur_ch == i),
.ladder ( ladder ),
.op_result ( op_result ),
.rl ( rl ),
// note that the order changes to deal
// with the operator pipeline delay
.zero ( zero ),
.s1_enters ( s2_enters ),
.s2_enters ( s1_enters ),
.s3_enters ( s4_enters ),
.s4_enters ( s3_enters ),
.ch6op ( ch6op ),
.pcm_en ( pcm_en ), // only enabled for channel 6
.pcm ( pcm2 ),
.alg ( alg_I ),
// combined output
.left ( accum_l[i]),
.right ( accum_r[i])
);
end

end
if( use_pcm==0 && use_adpcm==0 ) begin : gen_2203_acc // YM2203 accumulator
wire signed [15:0] mono_snd;
Expand Down
16 changes: 13 additions & 3 deletions system.sv
Original file line number Diff line number Diff line change
Expand Up @@ -104,6 +104,7 @@ module system
input ROM_ACK2,

input EN_HIFI_PCM,
input LADDER,
input OBJ_LIMIT_HIGH
);

Expand Down Expand Up @@ -1201,6 +1202,7 @@ jt12 fm
.din(ZBUS_DO),
.dout(FM_DO),
.en_hifi_pcm( EN_HIFI_PCM ),
.ladder(LADDER),
.snd_left(FM_left),
.snd_right(FM_right)
);
Expand All @@ -1221,13 +1223,21 @@ genesis_fm_lpf fm_lpf_r
.out(FM_LPF_right)
);

wire signed [15:0] fm_select_l = ((LPF_MODE == 2'b01) ? FM_LPF_left : FM_left);
wire signed [15:0] fm_select_r = ((LPF_MODE == 2'b01) ? FM_LPF_right : FM_right);

wire signed [15:0] fm_adjust_l = (fm_select_l << 4) + (fm_select_l << 2) + (fm_select_l << 1) + (fm_select_l >>> 2);
wire signed [15:0] fm_adjust_r = (fm_select_r << 4) + (fm_select_r << 2) + (fm_select_r << 1) + (fm_select_r >>> 2);

wire signed [10:0] psg_adjust = PSG_SND - (PSG_SND >>> 5);

jt12_genmix genmix
(
.rst(reset),
.clk(MCLK),
.fm_left((LPF_MODE == 2'b01) ? FM_LPF_left : FM_left),
.fm_right((LPF_MODE == 2'b01) ? FM_LPF_right : FM_right),
.psg_snd((PSG_SND >>> 1) + (PSG_SND >>> 5)),
.fm_left(fm_adjust_l),
.fm_right(fm_adjust_r),
.psg_snd(psg_adjust),
.fm_en(ENABLE_FM),
.psg_en(ENABLE_PSG),
.snd_left(PRE_LPF_L),
Expand Down

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