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Fix Slice pad support when last dimension is padded #2056

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merged 2 commits into from
Jun 24, 2020

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jantonguirao
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Why we need this PR?

Pick one, remove the rest

  • It fixes a bug when padding last dimension in Slice GPU

What happened in this PR?

Fill relevant points, put NA otherwise. Replace anything inside []

  • What solution was applied:
    strides were used to fuse dimensions before. However, for the last dimension strides are the same so we ended up fusing a dimension that needed to be padded. To solve that, we switch to checking shapes instead of strides (out_shape had to be added)
  • Affected modules and functionalities:
    Slice GPU kernel
  • Key points relevant for the review:
    Changes in the kernel
  • Validation and testing:
    Unit tests added
  • Documentation (including examples):
    N/A

JIRA TASK: [Use DALI-XXXX or NA]

Signed-off-by: Joaquin Anton <janton@nvidia.com>
Signed-off-by: Joaquin Anton <janton@nvidia.com>
@jantonguirao jantonguirao requested a review from a team June 24, 2020 13:18
/**
* @brief Fills output with nchannel values repeatedly
*/
template <typename T>
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moved those to common utilities because they'll be reused (in a follow up PR)

const OutputType *__restrict__ fill_values, int channel_dim,
uint64_t offset, uint64_t block_end) {
if (Dims > 1 && out_strides[Dims - 1] == in_strides[Dims - 1] && anchor[Dims - 1] == 0 &&
if (Dims > 1 && anchor[Dims - 1] == 0 && in_shape[Dims - 1] == out_shape[Dims - 1] &&
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This is the core of the bug fix

@jantonguirao
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!build

@dali-automaton
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CI MESSAGE: [1420323]: BUILD STARTED

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CI MESSAGE: [1420323]: BUILD PASSED

@jantonguirao jantonguirao merged commit d6364c3 into NVIDIA:master Jun 24, 2020
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4 participants