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[verilog preprocessor] half-working FILE, LINE #79

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Nic30 opened this issue Aug 28, 2019 · 1 comment

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Nic30 commented Aug 28, 2019

problem described in #46

Nic30 changed the title ~~[verilog preprocessor] halfworking __FILE__, __LINE__~~ [verilog preprocessor] half-working __FILE__, __LINE__

Nic30 mentioned this issue

release v1.3: VDHL-2008, SV2017, AST as Python objects, sim. part #48

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Nic30 commented Sep 17, 2019

Nic30 closed this as completed

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