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CPU-in-Verilog

A personal project of my Computer Architecture course, I spent about 3 week to write those code and set up a CPU from zero in the end.

I shared the code here, hope that it can help someone in need.

I learned how each module of cpu is structured and how different module messages with each other, althougth physically tired, I am grateful to it when I recall this experience.

code: a simple cpu as a total machine by Verilog, code of all modules in code directory screen: screen of all modules in screen directory the code

The code can be organized as the modules shown below: alu module, control module, io module, memory module, reg_stack module, usb_driver module, bcd module. In the end, I organize those modules together as a total machine cpu.

Details of the code can be found in the report.pdf

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Verilog Implementation of CPU

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