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ofs-2024.2-1 Release for Agilex 7 PCIe Attach Reference Shells

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@badanur badanur released this 16 Jul 03:59
ofs-2024.2-1
ab9d072

OFS 2024.2-1

Summary: OFS 2024.2-1 Release for Agilex® 7 PCIe Attach FPGAs

  • Boards Targeted:

    • Agilex® 7 FPGA I-Series Development Kit (2x R-Tile, F-Tile)
    • Agilex® 7 FPGA F-Series Development Kit (2x F-Tile)
    • Intel® FPGA SmartNIC N6001-PL/N6000-PL (P-Tile, E-Tile)

  • Board Management Controller (BMC):

    • MAX® 10 Nios® Firmware Version: 3.15.2 (Intel® FPGA SmartNIC N6001-PL/N6000-PL only)
    • MAX® 10 Build Version: 3.15.2 (Intel® FPGA SmartNIC N6001-PL/N6000-PL only)

    Agilex® 7 FPGA F-Series and I-Series Development Kits do not utilize an OFS compatible BMC, thus certain features such as remote system update are not supported.

  • Quartus® Prime Pro Version: 24.1

  • Quartus Prime Pro License File: quartus-0.0-0.02iofs-linux.run

  • Quartus Prime Pro Patch: Patches 0.18 (memory optimization), 0.26 (Quartus assembler). Note that patches are found at the bottom of this page in the assets.

  • OS Tested: Red Hat® Enterprise Linux® 8.10

    Note: OneAPI has been validated with Red Hat® Enterprise Linux® 8.8. If you are using OneAPI it is recommended you use RHEL 8.8.

  • OPAE Version: 2.13.0-3

  • Kernel Version: 4.18.0-dfl

  • OFS Agilex® 7 PCIe Attach FIM Github Branch: https://github.com/OFS/ofs-agx7-pcie-attach/tree/release/ofs-2024.2

  • OFS Agilex® 7 PCIe Attach FIM Github Tag: https://github.com/OFS/ofs-agx7-pcie-attach/releases/tag/ofs-2024.2-1

  • OFS FIM_COMMON Github Tag: https://github.com/OFS/ofs-fim-common/releases/tag/ofs-2024.2-1

OPAE SDK:

OPAE SIM:

Driver:

This page provides up-to-date information about the Open FPGA Stack (OFS) for Agilex® 7 PCIe Attach devices. This project targets the:

  • Agilex® 7 FPGA I-Series Development Kit (2xR-Tile, F-Tile)
  • Agilex® 7 FPGA F-Series Development Kit (2xF-Tile)
  • Intel® FPGA SmartNIC N6001-PL/N6000-PL

The summary of OFS framework features are shown below. To find out more about these platforms refer to the documentation below:

OFS Agilex®7 PCIe Attach FIM Key Features

Key Feature I-Series (2xR-Tile, 1xF-Tile) F-Series (2xF-Tile) F-Series (1xP-Tile, 1xE-Tile)
Target OPN AGIB027R29A1E2VR3 AGFB027R24C2E2VR2 AGFB014R24A2E2V
PCIe R-tile PCIe 1xGen5x16
R-tile PCIe 2xGen5x8
R-tile PCIe 1xGen4x16		 F-tile PCIe Gen4x16 P-tile PCIe Gen4x16
Virtualization 5 physical functions/3 virtual functions with ability to expand 5 physical functions/3 virtual functions with ability to expand 5 physical functions/3 virtual functions with ability to expand
Memory 4 Fabric DDR4 channels, x64 (no ECC), 2666 MHz, 8GB 3 DDR Channels:
• One HPS DDR4 bank, x40 (x32 Data and x8 ECC), 2400 MHz, 1GB each
• Two Fabric DDR4 banks, x64 (no ECC), 2400 MHz, 8GB		 5 DDR Channels:
• One HPS DDR4 bank, x40 (x32 Data and x8 ECC), 1200 MHz, 1GB each
• Four Fabric DDR4 banks, x32 (no ECC), 1200 MHz, 4GB
Ethernet 2x4x25GbE, 2x200GbE, 2x400GbE 2x4x25GbE • N6001-PL: 2x4x25GbE, 2x4x10GbE, or 2x100GbE
• N6000-PL: 4x100GbE
Hard Processor System Not enabled 64-bit quad core Arm® Cortex®-A53 MPCore with integrated peripherals. 64-bit quad core Arm® Cortex®-A53 MPCore with integrated peripherals.
Configuration and Board Manageability • FPGA Management Engine that provides general control of common FPGA tasks (ex. error reporting, partial reconfiguration) • FPGA Management Engine that provides general control of common FPGA tasks (ex. error reporting, partial reconfiguration) • FPGA Management Engine that provides general control of common FPGA tasks (ex. error reporting, partial reconfiguration)
• Platform Controller Management Interface (PMCI) Module for Board Management Controller
Partial Reconfiguration Supported Supported Supported
OneAPI OneAPI Acceleration Support Package (ASP) provided with compiled FIM to support OneAPI Runtime OneAPI Acceleration Support Package (ASP) provided with compiled FIM to support OneAPI Runtime OneAPI Acceleration Support Package (ASP) provided with compiled FIM to support OneAPI Runtime
Software Support • Linux DFL drivers targeting OFS FIMs
• OPAE Software Development Kit
• OPAE Tools		 • Linux DFL drivers targeting OFS FIMs
• OPAE Software Development Kit
• OPAE Tools		 • Linux DFL drivers targeting OFS FIMs
• OPAE Software Development Kit
• OPAE Tools
Target Board Agilex® 7 7 FPGA I-Series Development Kit (2xR-Tile, F-Tile) Agilex® 7 7 FPGA F-Series Development Kit (2x F-Tile) • Intel® FPGA SmartNIC N6001-PL
• Intel® 7 FPGA SmartNIC N6000-PL

The OFS hardware framework also provides:

  • Support for unit test simulation (using Synopsys® VCS® or Siemens® Questa™ simulators)
  • UVM support using Synopsys® VCS®
  • Host exercisers that allow you to test interfaces on the FPGA

The OFS software framework provides:

  • FPGA platform Linux drivers that are being upstreamed to linux.org
  • A programmable software development kit and userspace tools for managing the FPGA

Important: If you would like to begin evaluating the default shell that can be built from this repository, please scroll down to the "assets" accordion button below which contains the FPGA binary/POF/SOF along with the applicable Linux driver and Open Programmable Acceleration Engine (OPAE) software development kit (SDK) packages.

New Updates for ofs-2024.2-1 Release

  • Quartus Version moved to 24.1
  • I-Series Development Kit Reference FIM support for PCIe 1xGen5x16 and PCIe 1xGen4x16
  • OFSS updates to streamline the FIM build flow
  • Default PCIe Subsystem changed from "Intel FPGA IP Subsystem for PCI Express" to AXI Streaming Intel FPGA IP for PCI Express.
  • Default IOPLL clock frequency increased to 500MHz.
  • FIM clock made independent of the PCIe clock
  • PF/VF MUX is now hierarchical. If the width of the buses being multiplexed is too large for a single level, the MUX automatically generates a binary tree.
  • New support for multi-link AFUs in the FIM and OPAE. An AFU connecting to multiple PCIe links (e.g. 2xGen5x8) can be configured to behave as a single device in OPAE.
  • The OFS driver package is now built in the linux-dfl-backport repository, which points to older kernel versions. This change was necessary to mitigate potential issues in relation to core kernel packages that exist on a standard Red Hat 8.10 distribution installation. Installation instructions regarding environment setup and repository links can be found in the Software Installation Guide, and the newest version of the installer (provided in the assets at the bottom of this release page) point to the backport repository for this release.

Known Issues

This table describes the known issues for the 2024.1 OFS Release targeting Agilex® 7 devices.

ID Known Issues Workaround Status Platform Target Affected
16024517996 The OPAE hssistats tool shows zero packets on HSSI Port 7 after sending packets with the hssi tool. None Planned fix in a future Quartus patch Intel® FPGA SmartNIC N6000/1-PL
14020476585 The Quartus fitter fails when building the PCIe Attach F-tile FIM with ECC enabled on Memory channels 0 and 1 None Planned fix in a future release of OFS F-Series Development Kit
15016269892 PCIe Link Speed does not downgrade to Gen3 or Gen4 on I-Series DevKit FIM when built with the Gen5 configuration. If PCIe Gen4 is required, generate the iseries-dk FIM with PCIe Gen4. This can be done with the $OFS_ROOTDIR/tools/ofss_config/pcie/pcie_host_gen4.ofss There is no provided fix for Gen3. No future fix. I-Series Development Kit
14021039281 Currently there are three errors included as part of the output from the OPAE SDK command "fpgainfo errors all" that are not applicable to current platforms. These include PCIe0 Errors, PCIe1 Errors, and First Malformed Req. All three outputs may be safely ignored. None Planned fix in a future release of OFS. All
- R-tile Agilex PCIe Attach Reference FIM does not support UVM simulation. Only unit test simulation is available. None Planned fix in a future release of OFS I-Series Development Kit
- The UVM Copy Engine tests fail to build which results in all CE UVM tests to fail. None Planned fix in a future release of OFS N6001 | F-Series Development Kit
16023255633 The UVM he_mem_rd_cont_test fails when targeting the N6001 None Planned fix in a future release of OFS N6000
16024716667 The UVM simulation gets stuck on HSSI tx_pkx and rx_pkg tests when targeting the F-series Development Kit. None Planned fix in a future release of OFS F-Series Development Kit
- The Unit Tests fail when using Questasim targeting the N6001, F-Series Development Kit, and I-Series Development Kit designs. None Planned fix in a future release of OFS N6001 | fseries-dk | iseries-dk
16024616095 The Unit Test hssi_csr_test fails for HSSI configurations 200G and 400G when targeting the F-series Development Kit design. None Planned fix in a future release of OFS fseries-dk
14021146060 The R-Tile PCIe attach design requires a 16550 UART IP license file to be installed in Quartus Prime Pro even though it is not used in the design. None Planned fix in a future release of OFS I-Series Development Kit
14021023150 The fpgainfo phy command reports QSFP as not connected even if Ethernet ports are up because QSFP status is not routed to the FPGA in the Agilex® 7 I-Series Development Kit. Refer to the Port Status listed in the command to observe the link status. No future fix. I-Series Development Kit
14020129685 The hssi_loopback command is currently not supported when FIM Ethernet configuration is 2x100GbE. None Planned fix in a future release of OFS. Intel® FPGA SmartNIC N6000/1-PL
14018364039 The OPAE command fpgainfo bmc and fpgainfo temp display a "CVL" field that is not utilized by the design. None. Ignore "CVL" listings. Planned in a future release of OFS. Intel® FPGA SmartNIC N6001-PL

Resolved Issues

ID Resolved Issue Platform Target Affected
14021569447 Build script fails if the HSSI OFSS file is not provided when building F-series or I-series dev kit designs. I-Series and F-Series Development Kits
14021771678 Intel® FPGA SmartNIC N6000-PL FIM has incorrect subsystem ID. Intel® FPGA SmartNIC N6000-PL
14021789829 Reset synchronizers fail recovery/removal timing when building N6000 and N6001 designs with more than 8 Ethernet channels. Intel® FPGA SmartNIC N6001-PL/N6000-PL

Important Notes

The following section provides important information about this release:

ID Important Notes
- OneAPI has been validated with Red Hat® Enterprise Linux® 8.8. If you are using OneAPI it is recommended you use RHEL 8.8.
- When using the PF/VF configuration tool to reconfigure the PF/VF MUX, you must keep at least:
    • One (1) physical function and one (1) virtual function on PF0.
    OR
    • Two (2) physical functions.
All other PFs and VFs can be removed if desired.
15012246661 When enabling cable hotplug IP and ANLT, the E-tile recipe resulting from the ANLT initialization flow is over-written by the hotplug initialization flow. If you require a custom ANLT recipe, then you cannot use hotplug at this time. You can disable hotplug by writing 1 to index-0 of HSSI Hotplug Debug Control Register (offset 0x600B4) followed by a port level reset or analog reset.
15012406417 If using the Intel® FPGA SmartNIC N6001-PL Platform (SKU2) for evaluation of the OFS release, ensure DIP Switch SW1.4 on the board is set to convey the correct board type or the OPAE commands could display invalid temperature values for an Intel® NIC E810 (SKU1) which is not populated on the SKU2 board. For Intel® FPGA SmartNIC N6001-PL Platform (SKU2), SW1.4 must be off (pointing towards the PCIe goldfinger). Note that a BMC reset is required if you must flip the switch to the correct setting.
14020225084 The regress_run.py simulation script runs a superset of simulation tests for all configurations available in the ofs-agx7-pcie-attach repository. You can customize the regress_run.py script to run only the tests applicable to your design by using the -k list option in the script which directs the regression to only pick up tests you have listed in your list.txt file. Please refer to the FPGA Interface Manager Development Guide for more details.
Assets 15
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