[Feature]: samples:cxl_hello_fpga : Add support for Hello fpga feature for CMC

[pl-ravikanth]

samples:cxl_hello_fpga : Add support for Hello fpga feature for CMC

Problem/Feature: A new feature, hello fpga, is introduced for CMC

Fix/Workaround: Updates pertaining to hello fpga feature are newly added

Changes made: New folder named as cxl_hello_fpga along with required files are
introduced for supporting hello_fpga feature

Signed-off-by: Lakshmiravikanth Pammi lakshmiravikanth.pammi@intel.com

Test command:

• ./bin/cxl_hello_fpga hellofpga

Test Results:

(root@bapveac041T~/ravikanth/ALPHA/alpha_sws/hello_fpga_231030/hfm_checkin/opae-sdk/mybuild)-> ./bin/cxl_hello_fpga hellofpga
starting test run, count of 1
Number nodes on system:3
HE Cache app numa node:1
HE_TARGET_HOST numa node:1
Hello FPGA Start
Read/write number Lines:5
Read address table size:9
Write address table size:9
DSM buffer numa node: 0
Read/Write buffer numa node: 1
AFU Configuration : Successful
Test started ......
DATA Integrity Check : Successful
Hello FPGA Executed Successfully
Test hellofpga(1): PASS
(root@bapveac041T~/ravikanth/ALPHA/alpha_sws/hello_fpga_231030/hfm_checkin/opae-sdk/mybuild)->

[coveralls]

Pull Request Test Coverage Report for Build 7399486989

• 0 of 0 changed or added relevant lines in 0 files are covered.
• No unchanged relevant lines lost coverage.
• Overall coverage decreased (-1.7%) to 65.194%

---

Totals
Change from base Build 7390195103:	-1.7%
Covered Lines:	15756
Relevant Lines:	24168

---

💛 - Coveralls

[fpgamatt]

Since you are adding new C++ files, please use the clang-format tool to uniformly format the sourcecode. Use the following command:
clang-format -i --style=Google <c++filename>

[pl-ravikanth]

samples:cxl_hello_fpga : Add support for Hello fpga feature for CMC

Problem/Feature: A new feature, hello fpga, is introduced for CMC

Fix/Workaround: Updates pertaining to hello fpga feature are newly added

Changes made: New folder named as cxl_hello_fpga along with required files are
introduced for supporting hello_fpga feature

          1.Review comments shared by Ananda are added.
          2.Clang-format is applied for all source files available
            in cxl_hello_fpga as suggested by Gerlach, Matthew.

Signed-off-by: Lakshmiravikanth Pammi lakshmiravikanth.pammi@intel.com

[tswhison]

Just wondering, why are we masking this warning?

[pl-ravikanth]

samples:cxl_hello_fpga : Add support for Hello fpga feature for CMC

Problem/Feature: 1. A new feature, hello fpga, is introduced for CMC
2. CL bytes format is changed by RTL team

Fix/Workaround: 1. Updates pertaining to hello fpga feature are newly added
2. Driver is updated as per the change in CL integrity check
format.

Changes made: New folder named as cxl_hello_fpga along with required files are
introduced for supporting hello_fpga feature

          1.Review comments shared by Ananda are added.
          2.Clang-format is applied for all source files available
            in cxl_hello_fpga as suggested by Gerlach, Matthew.
          3.Integrity check API is updated as per the new CL format
            introduced by RTL team

Signed-off-by: Lakshmiravikanth Pammi lakshmiravikanth.pammi@intel.com

Test Command: ./bin/cxl_hello_fpga hellofpga

Test Result:

(root@bapveac041T~/ravikanth/ALPHA/alpha_sws/hello_fpga_231030/hfm_checkin/opae-sdk/mybuild)-> ./bin/cxl_hello_fpga hellofpga
starting test run, count of 1
Number nodes on system:3
HE Cache app numa node:0
HE_TARGET_HOST numa node:0
Hello FPGA Start
Read/write number Lines:5
Read address table size:9
Write address table size:9
DSM buffer numa node: 0
Read/Write buffer numa node: 0
AFU Configuration : Successful
Test started ......
DATA Integrity Check : Successful
Hello FPGA Executed Successfully
Test hellofpga(1): PASS

[pl-ravikanth]

Please review the above changes and approve to merge the changes into master.