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Basic Building Blocks (BBB) for Intel FPGAs is a suite of application building blocks and shims for transforming the CCI-P interface.
A set of slides containing an overview of the CCI-P interface and describing the importance of building blocks for constructing application-specific memories is available at cci-p-mpf-overview.pdf.
Memory Properties Factory (MPF): MPF shims may be mixed and matched to add features to the base CCI-P memory interface. Features include: virtual memory, ordered read responses, read/write hazard detection, and masked (partial) writes.
CCI-P Async-shim (CCI-P ASYNC): A clock crossing shim, allowing users to attach slower-running accelerators to the CCI-P interface.
CCI-P Multiplexer (CCI-P MUX): Allows multiple CCI-P compliant agents to share a single CCI-P interface.
These building blocks are implemented in SystemVerilog RTL and C or C++.
Some building blocks, such as the clock crossing shim, are pure hardware. Others, like MPF, include software that interacts with hardware. The installation guide covers compilation and installation of software libraries and the recommended mechanism for including BBB RTL in projects.
A tutorial on CCI-P and Basic Building Blocks (BBB) is in the top-level samples directory.