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Create emit function for PPC64 #16
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The emit function has already added, however we not made any optimizations. OptimizePPC64 is still not implemented. Still need tests. |
Emit function is done. If optimization is necessary, a new taks must be created. |
racardoso
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Dec 21, 2016
Summary: This brings forward some of the changes in vixl which has to do with the disassembly of the loadStoreExclusive Aarch64 instructions. It was noticed that some instructions where not disassembled correctly when examining the output from TRACE=printir:9 Before ==== 478 (03) IncProfCounter<1> 479 Main: 480 0x11a00030 d2800100 movz x0, #0x8 481 0x11a00034 f2b4f000 movk x0, #0xa780, lsl #16 482 0x11a00038 f2dfffe0 movk x0, #0xffff, lsl #32 483 0x11a0003c c85f7c12 unimplemented (Unimplemented) 484 0x11a00040 f1000652 subs x18, x18, #0x1 (1) 485 0x11a00044 c8127c12 unimplemented (Unimplemented) 486 0x11a00048 35ffffb2 cbnz w18, #-0xc 487 After === (comments added manually) 511 (03) IncProfCounter<1> 512 Main: 513 Closes facebook#7499 Differential Revision: D4202893 Pulled By: mxw fbshipit-source-id: f12cefe8d8a94ffc354e8d9c6fa5ea6378ad7500
racardoso
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Feb 10, 2017
Summary: On Aarch64 the loadb/movxbl sequence would generate ldrsb/uxtb. This occurred around the Vinstr cmpbm instructions. It is equivalent to just use the ldrb instruction and save one instruction per instance. Before ==== 14854 0: FPushFuncD 0 "ut_main" 14855 (03) EndGuards 14856 (07) t3:Func = LdFuncCached<ut_main> -> B2<Catch> 14857 Main: 14858 0x296008b0 d28217e0 movz x0, #0x10bf 14859 0x296008b4 38e06b60 ldrsb w0, [x27, x0] // <<--+ 14860 0x296008b8 53001c00 uxtb w0, w0 // <<--+ 14861 0x296008bc d29fffe1 movz x1, #0xffff 14862 0x296008c0 f2a05fe1 movk x1, #0x2ff, lsl #16 14863 0x296008c4 38616b61 ldrb w1, [x27, x1] 14864 0x296008c8 6b00003f cmp w1, w0 After ===== 320 0: FPushFuncD 0 "ut_main" 32 Closes facebook#7593 Differential Revision: D4442877 Pulled By: mxw fbshipit-source-id: 04af9bc4ce61ece185e6fa225b1b12950f0bab58
lbianc
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Jul 4, 2017
Summary: This creates an ARMv8 specific Vinstr to represent a commonly used form of the ubfm/ubfx instruction and the peephole to detect it. This pattern was seen in several of the regression tests. It is generated during the lowering of the callm instruction. Before ===== 0x434009c4 53001c21 uxtb w1, w1 0x434009c8 53027c21 lsr w1, w1, #2 0x434009cc d37df021 lsl x1, x1, #3 0x434009d0 d297c302 movz x2, #0xbe18 0x434009d4 f2a1c322 movk x2, #0xe19, lsl #16 0x434009d8 f8626821 ldr x1, [x1, x2] 0x434009dc d63f0020 blr x1 After ===== 0x40400994 53021c21 ubfx w1, w1, #2, #6 0x40400998 d37df021 lsl x1, x1, #3 0x4040099c d2965e02 movz x2, #0xb2f0 0x404009a0 f2a081a2 movk x2, #0x40d, lsl #16 0x404009a4 f8626821 ldr x1, [x1, x2] 0x404009a8 d63f0020 blr x1 This was seen 169 times in hphp/test/quick/all_type_comparison_test.php and 230 times in hphp/test/zend/good/ext/intl/tests/grapheme.php. The standard regression tests were run with 6 option sets. No new regressions seen. Closes facebook#7820 Differential Revision: D5063904 Pulled By: mxw fbshipit-source-id: 7a2fd19e498b09e8d2a01c6bb7abc575aa184727
lbianc
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Jul 4, 2017
Summary: This adds a quick pass for ARM targets which attempts to reuse immediate values generated by the ldimmq Vinstr. This pass only operates on single blocks. The span of this optimization is tunable so that it does not increase register pressure. The default for the new option is 8, (-vEval.JitLdimmqSpan=8). Here is an example of the pass firing on test/zend/good/ext/intl/tests/grapheme.php Without ===== 36918 (38) DecRef<-> t7:Str 36919 Main: 36920 0x468005f4 d29ffe40 movz x0, #0xfff2 36921 0x468005f8 f2a05fe0 movk x0, #0x2ff, lsl #16 36922 0x468005fc 78e06b61 ldrsh w1, [x27, x0] 36923 0x46800600 11000421 add w1, w1, #0x1 (1) 36924 0x46800604 78206b61 strh w1, [x27, x0] 36925 0x46800608 d29ffe80 movz x0, #0xfff4 //<<--+ 36926 0x4680060c f2a05fe0 movk x0, #0x2ff, lsl #16 //<<--+ 36927 0x46800610 78e06b61 ldrsh w1, [x27, x0] 36928 0x46800614 11000421 add w1, w1, #0x1 (1) 36929 0x46800618 78206b61 strh w1, [x27, x0] With === 36929 (38) DecRef<-> t7:Str 36930 Main: 36931 0x200005f0 d29ffe40 movz x0, #0xfff2 36932 0x200005f4 f2a05fe0 movk x0, #0x2ff, lsl #16 36933 0x200005f8 78e06b61 ldrsh w1, [x27, x0] 36934 0x200005fc 11000421 add w1, w1, #0x1 (1) 36935 0x20000600 78206b61 strh w1, [x27, x0] 36936 0x20000604 91000800 add x0, x0, #0x2 (2) //<<--- 36937 0x20000608 78e06b61 ldrsh w1, [x27, x0] 36938 0x2000060c 11000421 add w1, w1, #0x1 (1) 36939 0x20000610 78206b61 strh w1, [x27, x0] This was tested by running the regression tests with 6 different option sets. No regressions were introduced. Performance testing is pending. Closes facebook#7637 Differential Revision: D4501447 Pulled By: mxw fbshipit-source-id: 4f08109ddef35da85209b1ae09f40a4181353513
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In the file vasm-emit.cpp, the function Vauto executes a switch based on architecture, where it calls an emit function.
The prototype
emitPPC64
found onhphp/runtime/vm/jit/vasm-ppc64.cpp
has to be implemented and called.The text was updated successfully, but these errors were encountered: