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Updated shields in README and added introduction to the RTD documentation.
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README.md

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![PyPI - License](https://img.shields.io/pypi/l/pyVHDLParser)
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![GitHub tag (latest by date)](https://img.shields.io/github/v/tag/Paebbels/pyVHDLParser)
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![GitHub release (latest by date)](https://img.shields.io/github/v/release/Paebbels/pyVHDLParser)
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[![Documentation Status](https://readthedocs.org/projects/pyvhdlparser/badge/?version=latest)](https://pyVHDLParser.readthedocs.io/en/latest/?badge=latest)
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[![PyPI](https://img.shields.io/pypi/v/pyVHDLParser)](https://pypi.org/project/pyVHDLParser/)
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![PyPI - Python Version](https://img.shields.io/pypi/pyversions/pyVHDLParser)
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![PyPI - Wheel](https://img.shields.io/pypi/wheel/pyVHDLParser)
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![PyPI - Status](https://img.shields.io/pypi/status/pyVHDLParser)
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<!--
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[![Build Status](https://travis-ci.org/Paebbels/pyVHDLParser.svg?branch=master)](https://travis-ci.org/Paebbels/pyVHDLParser)
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-->
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[![PyPI - License](https://img.shields.io/pypi/l/pyVHDLParser?logo=PyPI)](LICENSE.md)
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[![GitHub tag (latest SemVer incl. pre-release)](https://img.shields.io/github/v/tag/Paebbels/pyVHDLParser?logo=GitHub&include_prereleases)](https://github.com/Paebbels/pyVHDLParser/tags)
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[![GitHub release (latest SemVer incl. including pre-releases)](https://img.shields.io/github/v/release/Paebbels/pyVHDLParser?logo=GitHub&include_prereleases)](https://github.com/Paebbels/pyVHDLParser/releases/latest)
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[![GitHub release date](https://img.shields.io/github/release-date/Paebbels/pyVHDLParser?logo=GitHub&)](https://github.com/Paebbels/pyVHDLParser/releases)
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[![Libraries.io status for latest release](https://img.shields.io/librariesio/release/pypi/pyVHDLParser)](https://libraries.io/github/Paebbels/pyVHDLParser)
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[![Requires.io](https://img.shields.io/requires/github/Paebbels/pyVHDLParser)](https://requires.io/github/Paebbels/pyVHDLParser/requirements/?branch=master)
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[![Travis](https://img.shields.io/travis/com/Paebbels/pyVHDLParser?logo=Travis)](https://travis-ci.com/Paebbels/pyVHDLParser)
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[![PyPI](https://img.shields.io/pypi/v/pyVHDLParser?logo=PyPI)](https://pypi.org/project/pyVHDLParser/)
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![PyPI - Status](https://img.shields.io/pypi/status/pyVHDLParser?logo=PyPI)
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![PyPI - Python Version](https://img.shields.io/pypi/pyversions/pyVHDLParser?logo=PyPI)
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[![Dependent repos (via libraries.io)](https://img.shields.io/librariesio/dependent-repos/pypi/pyVHDLParser)](https://github.com/Paebbels/pyVHDLParser/network/dependents)
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[![Codacy Badge](https://api.codacy.com/project/badge/Grade/1155f244b6f54a3a95abdaa80d6771f8)](https://www.codacy.com/manual/Paebbels/pyVHDLParser)
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[![Libraries.io SourceRank](https://img.shields.io/librariesio/sourcerank/pypi/pyVHDLParser)](https://libraries.io/github/Paebbels/pyVHDLParser/sourcerank)
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[![Read the Docs](https://img.shields.io/readthedocs/pyvhdlparser)](https://pyVHDLParser.readthedocs.io/en/latest/)
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# pyVHDLParser
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This is a token-stream based parser for VHDL-2008.
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Main goals:
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* slice an input document into text blocks which are categorized
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* group text blocks for fast-forward scanning
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* provide a generic VHDL language model
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## Intruduction
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Use cases:
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* generate documentation by using the fast-forward scanner
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* generate a document/language model by using the grouped text-block scanner
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* extract compile orders and other dependency graphs
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* generate highlighted syntax
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* re-annotate documenting comments to their objects for doc extraction
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### Main Goals
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Long time goals:
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* A Sphinx language plugin for VHDL
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* **Parsing**
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* slice an input document into **tokens** and text **blocks** which are categorized
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* preserve case, whitespace and comments
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* recover on parsing errors
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* good error reporting / throw exceptions
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* **Fast Processing**
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* multi-pass parsing and analysis
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* delay analysis if not needed at current pass
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* link tokens and blocks for fast-forward scanning
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* **Generic VHDL Language Model**
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* Assemble a document-object-model (Code-DOM)
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* Provide an API for code introspection
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### Use Cases
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* generate documentation by using the fast-forward scanner
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* generate a document/language model by using the grouped text-block scanner
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* extract compile orders and other dependency graphs
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* generate highlighted syntax
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* re-annotate documenting comments to their objects for doc extraction
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### Parsing approach
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1. slice an input document into **tokens**
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2. assemble tokens to text **blocks** which are categorized
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3. assemble text blocks for fast-forward scanning into **groups**
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4. translate groups into a document-object-model (DOM)
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5. provide a generic VHDL language model
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### Long time goals
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* A Sphinx language plugin for VHDL
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TODO: Move the following documentation to ReadTheDocs and replace it with a more lightweight version.
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## Basic Concept
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[![][concept]][concept]
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[concept]: https://raw.githubusercontent.com/Paebbels/pyVHDLParser/master/docs/images/Linking_TokenBlockGroup.png
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[concept]: https://raw.githubusercontent.com/Paebbels/pyVHDLParser/master/doc/images/Linking_TokenBlockGroup.png
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## Example 1
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doc/index.rst

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The pyVHDLParser Documentation
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##############################
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pyVHDLParser is a streaming parser for VHDL to extract the documentation.
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This is a token-stream based parser for VHDL-2008.
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Main Goals
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**********
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* **Parsing**
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* slice an input document into **tokens** and text **blocks** which are categorized
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* preserve case, whitespace and comments
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* recover on parsing errors
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* good error reporting / throw exceptions
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* **Fast Processing**
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* multi-pass parsing and analysis
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* delay analysis if not needed at current pass
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* link tokens and blocks for fast-forward scanning
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* **Generic VHDL Language Model**
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* Assemble a document-object-model (Code-DOM)
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* Provide an API for code introspection
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Use Cases
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*********
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* generate documentation by using the fast-forward scanner
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* generate a document/language model by using the grouped text-block scanner
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* extract compile orders and other dependency graphs
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* generate highlighted syntax
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* re-annotate documenting comments to their objects for doc extraction
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Parsing approach
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****************
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1. slice an input document into **tokens**
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2. assemble tokens to text **blocks** which are categorized
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3. assemble text blocks for fast-forward scanning into **groups**
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4. translate groups into a document-object-model (DOM)
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5. provide a generic VHDL language model
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Long time goals
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***************
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* A Sphinx language plugin for VHDL
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.. only:: html
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News
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****
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News
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****
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.. only:: html
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setup.py

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setuptools.setup(
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name=projectName,
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version="0.4.1",
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version="0.4.2",
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author="Patrick Lehmann",
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author_email="Paebbels@gmail.com",
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"Programming Language :: Python :: 3.6",
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"Programming Language :: Python :: 3.7",
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"Programming Language :: Python :: 3.8",
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"Development Status :: 3 - Alpha",
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"Development Status :: 2 - Pre-Alpha",
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# "Development Status :: 3 - Alpha",
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# "Development Status :: 5 - Production/Stable",
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"Intended Audience :: Developers",
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"Topic :: Utilities"

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