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rsx: Recover from invalid writes to CELL_GCM_NV4097_SET_INDEX_ARRAY_DMA #6737

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merged 3 commits into from Oct 10, 2019

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elad335
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@elad335 elad335 commented Oct 10, 2019

Hw tests reveal that any write with a bit set to 1 which are not bits 0 or 3 to register CELL_GCM_NV4097_SET_INDEX_ARRAY_DMA, results in an exception being raised at the write command.
Because the exception is raised at command write, that's where I decided to put the validation check.
This improves stability in Metal Gear Solid 4, allowing the renderer to continue after such crash.

Second commit improves FIFO recovery when the last semaphore came from a flip, allowing to reset registers using gcm's reset by ignoring the last semaphore_release (recovering from the first semaphore_acquire instead). Inspired by flip commands sequence dump

const bool is_flip_sema = offset == 0x10 && ctxt == CELL_GCM_CONTEXT_DMA_SEMAPHORE_R;
if (!is_flip_sema)
{
rsx->sync_point_request = true;
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I had an idea to set up a special recovery command sequence for this purpose, but I suppose we can exploit the inbuilt flip routine for this too.

@elad335 elad335 requested a review from kd-11 October 10, 2019 13:19
@elad335 elad335 force-pushed the rsx-fifo-break-wall-smash branch 2 times, most recently from 8399503 to 5fac477 Compare October 10, 2019 13:52
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elad335 commented Oct 10, 2019

Added some unknown yet valid methods.

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2 participants