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  1. Shih-Jiun-Lin.github.io Shih-Jiun-Lin.github.io Public

    HTML

  2. The-design-of-adders The-design-of-adders Public

    The design of half adder, full-adder and ripple adder.

    VHDL

  3. The-design-of-7seg-display-decoder The-design-of-7seg-display-decoder Public

    The design of hex to 7seg display decoder.

    VHDL

  4. The-design-of-carry-lookahead-adder-and-subtractor The-design-of-carry-lookahead-adder-and-subtractor Public

    The design of carry-lookahead adder /subtractor, and the application of 7-seg display.

    VHDL

  5. Frequency_Divider Frequency_Divider Public

    Frequency Divider VHDL Implementation

    VHDL

  6. Comparator Comparator Public

    Implementation of Comparator with VHDL

    VHDL