You signed in with another tab or window. Reload to refresh your session.You signed out in another tab or window. Reload to refresh your session.You switched accounts on another tab or window. Reload to refresh your session.Dismiss alert
I noticed that for single pulse registers, PeakRDL-regblock is generating if(1) conditions for resetting the registers back to 0, such as in the code below.
....
load_next_c = '1;
end else if(1) begin // singlepulse clears back to 0
next_c = '0;
load_next_c = '1;
end
May I request that the if(1) conditions be omitted for singlepulse registers (and other components/registers), because it generates warning messages and has the possibility to cause synthesizers to generate extra logic?
Thank you!
The text was updated successfully, but these errors were encountered:
Hello Alex,
I noticed that for single pulse registers, PeakRDL-regblock is generating
if(1)
conditions for resetting the registers back to 0, such as in the code below.May I request that the
if(1)
conditions be omitted for singlepulse registers (and other components/registers), because it generates warning messages and has the possibility to cause synthesizers to generate extra logic?Thank you!
The text was updated successfully, but these errors were encountered: