ASAP7 DRC

[yathAg]

The current asap7 designs have drc issues based on my observations. I believe these errors match the DRC guidelines for ASAP7, and this drc check can be included for further testing and improving the flow. It would be great if someone could test this and point out any corrections in my method described below.

• The drc files are from https://github.com/laurentc2/ASAP7_for_KLayout

• The drc rules for asap7 can be found at https://github.com/The-OpenROAD-Project/asap7/blob/master/asap7PDK_r1p7/docs/asap7_drm_201207a.pdf

The drc tests were carried out on the gcd design for asap7

On running the drc for asap7/gcd, there are 348 violations

These violations can be seen in detail by running the .lydrc script in Klayout by

• Launch klayout
• open the 6_final.gds file produced from
  make DESIGN_CONFIG=./designs/asap7/gcd/config.mk
• under the tools -> DRC -> new DRC script import the asap7.lydrc file and run the drc check.

This results in a GUI tool listing out all the drc violations with their count, description and location.

I have attached the screenshot one reported DRC on metal1 layer

All the DRC errors can be saved to a .rpt file using the drc browser, and I have attached the same below
I have also attached the asap7.lydrc file ( both as .txt as GitHub doesn't allow those formats)

asap7.lydrc.txt

6_drc_count.rpt.txt

[vijayank88]

@maliberty
I've seen version 26/27/28 in ASAP7 with 6.5/7.5 layers. Is https://github.com/The-OpenROAD-Project/asap7/blob/master/asap7PDK_r1p7/docs/asap7_drm_201207a.pdf the drc rule same for all?

[maliberty]

I think you mean 6.5/7.5 tracks for the cell height as I don't know what a .5 layer would be. Yes the rules should be the same.

[yathAg]

@maliberty @rovinski @vijayank88

One of the common DRC issues that occurs is in the routing of v2 and m3

according to the rule V2.M3.AUX.2 described in the ASAP7 rules pdf "V2.M3.AUX.2 : V2 must exactly be the same width as M3 along the direction perpendicular to the M3 length"

This error is seen multiple times on the asap7/gcd design where power nets on m5 are connected to m2.

From what I can observe the Via2 layer matches the width of m2 instead of m3 and hence leading to this DRC error.
Could you guide me on how this error could be resolved? Or what changes have to be made related to the routing files to meet the Rules?

[yathAg]

The tech LEF file has specific rules for stacked vias (SAV). Are those not being used?

Also, for this other DRC error, V4.M5.AUX.2 A default-sized Via is created.

To avoid this, must a specific via under the LEF58_SPACINGTABLE for v4 be created? Because I see rules for track widths of 0.024, 0.12, 0.216, 0.312, 0.408 related to m5

And since every other reported DRC error seems to be correct according to the mentioned PDF, @maliberty do you have any suggestion as to how I can address these? Also, would this DRC check be helpful for other users?

[gadfort]

I think the tech lef is missing a lot of the information needed. Without enclosure rules in the LEF there would be nothing to indicate what is allowed and not allowed. I certainly see an issue with the fact that here is only 1 cut defined for each via layer, so this rule would be impossible to honor unless the metal widths are restricted in the lef as well.

[yathAg]

Thank you for the amazing insight. I haven't worked with LEF files before this. Could you point me to any resources I could use to understand how to work with them?

[gadfort]

You can look at: http://coriolis.lip6.fr/doc/lefdef/lefdefref/LEFSyntax.html
It's not complete, but might be a good start

[yathAg]

Thanks for the resource. I found this pdf also to be really useful https://www.ispd.cc/contests/18/lefdefref.pdf and have been able to resolve the smaller DRC issues with this!!!

As far as I understood, the tech LEF file has all the required specifications for the via and metal layers. and this is also followed with the LEF files of other PDK's such as SKY130 and FREEPDK45
How are the rules for other layers such as Nselect , gate etc. defined because there is another DRC issue wrt NSELECT and PSELECT minimum width

How can I approach this?