A collection of Verilog/Innovus experiments.
Flexible 32-bit square-root implementation. Implemented with Cadence Genus/Innovus and FreePDK45. Lacking formal verification.
Simple SPI-to-UART bridge emulating the Sharp LS013B7DH05 MiP display for smartwatch development purposes with the Asterix RebbleOS platform and the Nordic nRF52840DK. There is a really small serial reader program in asterix-emu/viewer.
Simple 8-bit CPU using someone else's ISA. Implemented with Cadence Genus/Innovus and FreePDK45. Lacking any verification.