Add support for automated IP simulation in latest Vivado versions

[smgl9]

Hello,

I tested several Vivado and Modelsim versions in Linux and windows for the following example:
https://github.com/VUnit/vunit/tree/master/examples/vhdl/vivado
It woks for vivado 2016.4 (Windows and Linux) as it is documented. In other cases (vivado 2017.4 & 2018.2) I got the next error:

Standard libraries already exists in /home/iperez/Escritorio/vunit-master/examples/vhdl/vivado/vivado_libs/standard, skipping
Compiling into fifo_generator_v13_2_2: myproject_ip/fifo_8b_32w/hdl/fifo_generator_v13_2_rfs.vhd failed
=== Command used: ===
/opt/modelsim/18.0/modelsim_ase/linuxaloem/vcom -quiet -modelsimini /home/iperez/Escritorio/vunit-master/examples/vhdl/vivado/vunit_out/modelsim/modelsim.ini -93 -work fifo_generator_v13_2_2 /home/iperez/Escritorio/vunit-master/examples/vhdl/vivado/myproject_ip/fifo_8b_32w/hdl/fifo_generator_v13_2_rfs.vhd

=== Command output: ===
** Error: /home/iperez/Escritorio/vunit-master/examples/vhdl/vivado/myproject_ip/fifo_8b_32w/hdl/fifo_generator_v13_2_rfs.vhd(64): (vcom-1598) Library "xpm" not found.
** Error: /home/iperez/Escritorio/vunit-master/examples/vhdl/vivado/myproject_ip/fifo_8b_32w/hdl/fifo_generator_v13_2_rfs.vhd(64): (vcom-1136) Unknown identifier "<protected>".
** Error: /home/iperez/Escritorio/vunit-master/examples/vhdl/vivado/myproject_ip/fifo_8b_32w/hdl/fifo_generator_v13_2_rfs.vhd(64): VHDL Compiler exiting

[kraigher]

It is because Xilinx started to use the new xpm library underneath the fifo. The compile_standard_libs.tcl must be modified to also compile the xpm library in addition to unisim.

[smgl9]

Modifying compile_standard_libs.tcl file I can compile xpm library like you mentioned.
In some projects I get the error that is commented in #172
In other cases I get another error:

output_file=vivado_libs/project_ip/compile_order.txt
Scanning sources...
Finished scanning sources
INFO: [IP_Flow 19-234] Refreshing IP repositories
INFO: [IP_Flow 19-1704] No user IP repositories specified
INFO: [IP_Flow 19-2313] Loaded Vivado IP repository '/opt/Xilinx/vivado/Vivado/2017.4/data/ip'.
INFO: [IP_Flow 19-1686] Generating 'Simulation' target for IP 'xcvr_fmc134'...

INFO: [IP_Flow 19-1686] Generating 'Simulation' target for IP 'axi_register_slice'...
INFO: [Common 17-206] Exiting Vivado at Wed Jun 27 11:27:14 2018...
Traceback (most recent call last):
  File "run.py", line 99, in <module>
    project_file=join(root, "fmc134_proj", "fmc134_proj.xpr"))
  File "/home/iperez/git/FMC134/tb/vivado_util.py", line 27, in add_vivado_ip
    compile_project_ip(vunit_obj, project_file, project_ip_path)
  File "/home/iperez/git/FMC134/tb/vivado_util.py", line 46, in compile_project_ip
    compile_order, libraries, include_dirs = read_compile_order(compile_order_file)
  File "/home/iperez/git/FMC134/tb/vivado_util.py", line 105, in read_compile_order
    include_dirs.add(dirname(file_info.file_name))
NameError: global name 'file_info' is not defined

My simulator is Modelsim

[kraigher]

@smgl9 I fixed the problem you reported now.

[smgl9]

Perfect! It woks now.
Thank you!