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AIE2 support follow-up changes #7322

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merged 3 commits into from
Feb 1, 2023
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pgschuey
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Problem solved by the commit

  • Corrected data type of MEM tile port master
  • Configuring Sel0/1 of MEM tiles
  • Corrected module type bug in profiling and resource verification of MEM tiles
  • Other bug fixes

Bug / issue (if any) fixed, which PR introduced the bug, how it was discovered

  • Lots of bug fixes (see above)
  • Previous PR was intended to be initial implementation before board work

Risks (if any) associated the changes in the commit

Now using XAie_EventSelectDmaChannel, a new API

What has been tested and how, request additional testing if necessary

Lots of testing on vek280 Rev A boards

Paul Schumacher added 3 commits January 27, 2023 16:17
Signed-off-by: Paul Schumacher <schuey@xilinx.com>
Signed-off-by: Paul Schumacher <schuey@xilinx.com>
Signed-off-by: Paul Schumacher <schuey@xilinx.com>
@gbuildx
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gbuildx commented Feb 1, 2023

Build Failed! :(

@chvamshi-xilinx
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retest this please

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gbuildx commented Feb 1, 2023

Build Passed!

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@jvillarre jvillarre left a comment

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Bug fixes look good, but some places can be refactored (such as calling our utility function getCurrentDateTime() instead of calling chrono in multiple places) in future pull requests.

@jvillarre jvillarre merged commit b089eda into Xilinx:master Feb 1, 2023
rajkumar-xilinx pushed a commit to rajkumar-xilinx/XRT that referenced this pull request Feb 7, 2023
@pgschuey pgschuey deleted the aie2_changes_2 branch May 3, 2023 21:08
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4 participants